numbers reflect the limitations of the test circuit rather than the
device itself.
IS
≤
ID
-
10A
di
/
dt
≤
700A/µs
VR
≤
1100
TJ
≤
150
°
C
6 Eon includes diode reverse recovery. See figures 18, 20.
APT Reserves the right to change, without notice, the specifications and information contained herein.
0.45
Z
JC
, THERMAL IMPEDANCE (°C/W)
θ
0.40
0.35
0.30
0.25
0.9
0.7
0.5
0.20
0.15
0.10
0.05
0
10
-5
0.1
0.05
10
-4
SINGLE PULSE
0.3
Note:
PDM
t1
t2
Duty Factor D = t1/t2
Peak TJ = PDM x Z
θJC
+ TC
050-7185 Rev A
2-2004
10
-3
10
-2
10
-1
RECTANGULAR PULSE DURATION (SECONDS)
FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
1.0
Typical Performance Curves
25
I
D
, DRAIN CURRENT (AMPERES)
APT1101R2BFLL_SFLL
VGS =15 & 10V
20
7V
15
7.5V
RC MODEL
Junction
temp. (°C)
0.164
Power
(watts)
0.257
Case temperature. (°C)
0.125F
0.00592F
6.5V
10
6V
5
5.5V
0
5
10
15
20
25
30
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS
0
FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL
30
I
D
, DRAIN CURRENT (AMPERES)
R
DS
(ON), DRAIN-TO-SOURCE ON RESISTANCE
VDS> ID (ON) x RDS (ON)MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
1.40
NORMALIZED TO
= 10V @ 5A
V
GS
25
20
15
1.30
1.20
VGS=10V
TJ = -55°C
TJ = +25°C
1.10
10
5
TJ = +125°C
0
0
1
2
3
4
5
6
7
8
9
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 4, TRANSFER CHARACTERISTICS
1.00
VGS=20V
0.90
0.80
0
4 6
8 10 12 14 16 18 20
I
D
, DRAIN CURRENT (AMPERES)
FIGURE 5, R
DS
(ON) vs DRAIN CURRENT
2
10
9
I
D
, DRAIN CURRENT (AMPERES)
BV
DSS
, DRAIN-TO-SOURCE BREAKDOWN
VOLTAGE (NORMALIZED)
I
V
D
1.15
8
7
6
5
4
3
2
1
1.10
1.05
1.00
0.95
50
75
100
125
150
T
C
, CASE TEMPERATURE (°C)
FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE
R
DS
(ON), DRAIN-TO-SOURCE ON RESISTANCE
(NORMALIZED)
0
25
0.90
3
2.5
2.0
1.5
= 5A
= 10V
-50 -25
0
25
50
75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-50
050-7185 Rev A
2-2004
GS
1.0
0.5
0
-50
-25
0
25 50
75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
FIGURE 8, ON-RESISTANCE vs. TEMPERATURE
V
GS
(TH), THRESHOLD VOLTAGE
(NORMALIZED)
-25
0
25
50
75 100 125 150
T
C
, CASE TEMPERATURE (°C)
FIGURE 9, THRESHOLD VOLTAGE vs TEMPERATURE
APT1101R2BFLL_SFLL
40
OPERATION HERE
LIMITED BY RDS (ON)
10,000
I
D
, DRAIN CURRENT (AMPERES)
10
100µS
5
C, CAPACITANCE (pF)
Ciss
1,000
Coss
100
Crss
1
.5
TC =+25°C
TJ =+150°C
SINGLE PULSE
1
10
100
1100
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
16
I
D
1mS
10mS
.1
= 10A
12
VDS= 220V
I
DR
, REVERSE DRAIN CURRENT (AMPERES)
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
0
10
20
30
40
50
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
100
10
TJ =+150°C
10
TJ =+25°C
8
VDS= 550V
VDS= 880V
4
20
40
60
80
100 120 140
Q
g
, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE
50
t
d(off)
40
t
d(on)
and t
d(off)
(ns)
V
DD
G
0
0
0.3
0.5
0.7
0.9
1.1
1.3
1.5
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
50
1
40
= 733V
30
t
r
and t
f
(ns)
R
= 5Ω
30
V
DD
G
= 733V
t
f
T = 125°C
J
R
= 5Ω
L = 100µH
T = 125°C
J
20
20
L = 100µH
10
t
d(on)
0
4
10
12
14
16
I
D
(A)
FIGURE 14, DELAY TIMES vs CURRENT
V
DD
G
10
t
r
0
6
8
10
12
14
16
I
D
(A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
1000
E
on
SWITCHING ENERGY (µJ)
4
6
8
1000
= 733V
R
= 5Ω
800
SWITCHING ENERGY (µJ)
T = 125°C
J
L = 100µH
E
ON
includes
diode reverse recovery.
E
on
800
600
600
400
400
V
2-2004
E
off
200
DD
= 733V
I
D
J
= 10A
200
E
off
0
10
12
14
16
I
D
(A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
4
6
8
T = 125°C
L = 100µH
E
ON
includes
050-7185 Rev A
0
0
5
diode reverse recovery.
10 15 20 25 30 35 40 45 50
R
G
, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE
Typical Performance Curves
APT1101R2BFLL_SFLL
Gate Voltage
90%
T
J
= 125°C
Gate Voltage
t
d(off)
DrainVoltage
T
J
= 125°C
10%
t
d(on)
t
r
Drain Current
90%
5%
10%
5%
DrainVoltage
Switching Energy
Switching Energy
90%
t
f
10%
Drain Current
0
Figure 18, Turn-on Switching Waveforms and Definitions
Figure 19, Turn-off Switching Waveforms and Definitions
APT15DF100
V
DD
I
C
V
CE
G
D.U.T.
Figure 20, Inductive Switching Test Circuit
TO-247 Package Outline
Drain
(Heat Sink)
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
6.15 (.242) BSC
D PAK Package Outline
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05 (.632)
13.41 (.528)
13.51 (.532)
3
15.49 (.610)
16.26 (.640)
5.38 (.212)
6.20 (.244)
1.04 (.041)
1.15 (.045)
Drain
20.80 (.819)
21.46 (.845)
3.50 (.138)
3.81 (.150)
Revised
4/18/95
13.79 (.543)
13.99 (.551)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
0.46 (.018)
0.56 (.022) {3 Plcs}
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
19.81 (.780)
20.32 (.800)
1.22 (.048)
1.32 (.052)
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
Source
Drain
Gate
Dimensions in Millimeters (Inches)
APT’s products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522
5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
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