HANBit
HMF8M32M8GL
FLASH-ROM MODULE 32MByte (8M x 32-Bit)
Part No. HMF8M32M8GL
GENERAL DESCRIPTION
The HMF8M32M8GL is a high-speed flash read only memory (FROM) module containing 8,388,608 words organized in a
x32bit configuration. The module consists of eight 4M x 8bit FROM mounted on a 72-pin, double-sided, FR4-printed circuit board.
Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is
similar to reading from 12.0V flash or EPROM devices. This module is 2 bank organized, each bank containing 4Mx32bit, Bank
selection is selected by Bank-E0, Bank-E1 inputs. Byte write enable inputs, (/WE0, /WE1, /WE2, /WE3) are used to enable the
module’s 8bits independently. Output enable (/OE) and write enable (/WE) can set the memory input and output. When FROM
module is disable condition the module is becoming power standby mode, system designer can get low-power design. All
module components may be powered from a single +5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
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Access time : 75, 90 and 120ns
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High-density 32MByte design
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High-reliability, low-power design
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Single + 5V
±
0.5V power supply
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Easy memory expansion
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All inputs and outputs are TTL-compatible
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FR4-PCB design
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Low profile 72-pin SIMM
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Minimum 1,000,000 write/erase cycle
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Sectors erase architecture
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Sector group protection
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Temporary sector group unprotection
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The used device is AM29F032B
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
-75
-90
-120
17
18
19
20
21
M
22
23
24
PIN ASSIGNMENT
SYMBOL
Vss
/BANK-
E1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
Vcc
DQ7
/WE0
RY- /BY
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
/WE1
NC
DQ16
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
DQ17
DQ18
DQ19
DQ20
DQ21
Vcc
DQ22
DQ23
/WE2
NC
DQ24
DQ25
DQ26
DQ27
Vss
DQ28
DQ29
DQ30
DQ31
/WE3
NC
/RESET
A19
/OE
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
/BANK-E0
A18
A17
A16
A15
A14
A13
A12
A11
A10
Vcc
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
A20
A21
Vss
OPTIONS
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Timing
75ns access
90ns access
120ns access
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Packages
72-pin SIMM
MARKING
URL:
www.hbe.co.kr
REV.02(August,2002)
1
HANBit Electronics Co., Ltd.
HANBit
Functional Block Diagram
HMF8M32M8GL
DQ0 - DQ31
A0-A21
A0-21
/WE0
/WE
/OE
/CE
RY-BY
/Reset
DQ 0-7
/WE0
A0-21
U1
/WE
/OE
/CE
RY-BY
/Reset
DQ 0-7
U5
A0-21
/WE1
/WE
/OE
/CE
RY-BY
/Reset
DQ 8-15
/WE1
A0-21
U2
/WE
/OE
/CE
RY-BY
/Reset
DQ 8-15
U6
A0-21
/WE2
/WE
/OE
/CE
RY-BY
/Reset
DQ16-23
/WE2
A0-21
U3
/WE
/OE
/CE
RY-BY
/Reset
DQ16-23
U7
A0-21
/WE3
/OE
/RY_BY
/Reset
/Bank-E0
/Bank-E1
/WE
/OE
/CE
RY-BY
/Reset
DQ24-31
/WE3
/OE
/RY_BY
/Reset
A0-21
U4
/WE
/OE
/CE
RY-BY
/Reset
DQ24-31
U8
URL:
www.hbe.co.kr
REV.02(August,2002)
2
HANBit Electronics Co., Ltd.
HANBit
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE or ERASE
NOTE:
X means don’t care
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
DQ
HIGH-Z
HIGH-Z
Q
D
HMF8M32M8GL
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage with respect to ground all other pins
Voltage with respect to ground Vcc
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
T
STG
RATING
-2.0V to +7.0V
-2.0V to +7.0V
-65oC to +150oC
Operating Temperature
T
A
-55oC to +125oC
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Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Vcc for
±
5% device supply voltage
Vcc for
±
10% device supply voltages
Ground
SYMBOL
Vcc
Vcc
V
SS
MIN
4.75V
4.5V
0
0
TYP.
MAX
5.25V
5.5V
0
DC AND OPERATING CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Vcc Active Current for Read(1)
Vcc Active Current for Program
/CE = V
IL
, /OE=V
IH
or Erase(2)
Vcc Standby Current
Low Vcc Lock-Out Voltage
Notes:
1. The Icc current listed is typically less than 2mA/MHz, with /OE at V
IH
.
2. Icc active while embedded algorithm (program or erase) is in progress
/CE= V
IH
I
CC3
V
LKO
3.2
1.0
4.2
mA
V
I
CC2
60
mA
TEST CONDITIONS
Vcc=Vcc max, V
IN
= GND to Vcc
Vcc=Vcc max, VOUT= GND to Vcc
I
OH
= -2.5mA, Vcc = Vcc min
I
OL
= 12mA, Vcc =Vcc min
/CE = V
IL
, /OE=V
IH
,
SYMBOL
I
L1
I
L0
V
OH
V
OL
I
CC1
2.4
0.45
40
MIN
MAX
±1.0
±1.0
UNITS
µA
µA
V
V
mA
URL:
www.hbe.co.kr
REV.02(August,2002)
3
HANBit Electronics Co., Ltd.
HANBit
3. Maximum Icc current specifications are tested with Vcc=Vcc max
HMF8M32M8GL
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
MIN.
Sector Erase Time
Byte Programming Time
Chip Programming Time
-
-
-
TYP.
1
7
28.8
MAX.
Excludes 00H programming
8
300
86.4
sec
prior to erasure
µs
sec
Excludes system-level overhead
Excludes system-level overhead
UNIT
COMMENTS
TSOP CAPACITANCE
PARAMETER
SYMBOL
C
IN
C
OUT
C
IN2
PARAMETER
TEST SETUP
DESCRIPTION
Input Capacitance
Output Capacitance
Control Pin Capacitance
V
IN
= 0
V
OUT
= 0
V
IN
= 0
6
8.5
7.5
7.5
12
9
pF
pF
pF
MIN
MAX
UNIT
Notes
: Test conditions T
A
= 25
o
C, f=1.0 MHz.
AC CHARACTERISTICS
u
Read Only Operations Characteristics
PARAMETER
SYMBOLS
JEDEC
t
AVAV
t
AVQV
STANDARD
t
RC
t
ACC
Address to Output Delay
/OE = V
IL
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
t
CE
t
OE
t
DF
t
DF
t
QH
/CE or /OE, Whichever Occurs First
Chip Enable to Output Delay
Chip Enable to Output Delay
Chip Enable to Output High-Z
Output Enable to Output High-Z
Output Hold Time From Addresses,
Min
0
0
ns
/OE = V
IL
Max
Max
Max
Max
70
40
20
20
90
40
20
20
ns
ns
ns
ns
Read Cycle Time
/CE = V
IL
Max
70
90
ns
Min
70
90
ns
DESCRIPTION
TEST SETUP
-75
-90
UNIT
URL:
www.hbe.co.kr
REV.02(August,2002)
4
HANBit Electronics Co., Ltd.
HANBit
TEST SPECIFICATIONS
TEST CONDITION
Output load
Output load capacitance,
30
C
L
(Including jig capacitance)
Input rise and full times
Input pulse levels
Input timing measurement reference levels
Output timing measurement reference levels
5
0.0 - 3.0
1.5
1.5
75
HMF8M32M8GL
ALL OTHERS
1TTL gate
100
20
0.45-2.4
0.8
2.0
UNIT
pF
ns
V
V
V
5.0V
2.7kΩ
Device
Under
Test
C
L
IN3064
or Equivalent
6.2kΩ
Diodes = IN3064
or Equivalent
Note
: C
L
= 100pF including jig capacitance
u
Write (Erase/Program) Operations
PARAMETER
SYMBOLS
JEDEC
t
AVAV
t
AVWL
t
WLAX
t
DVWH
t
WHDX
t
GHWL
t
ELWL
t
WHEH
t
WLWH
t
WHWL
URL:
www.hbe.co.kr
REV.02(August,2002)
DESCRIPTION
-75
-90
UNIT
STANDARD
t
WC
t
AS
t
AH
t
DS
t
DH
t
GHWL
t
CS
t
CH
t
WP
t
WPH
Write Cycle Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Read Recover Time Before Write
/CE Setup Time
/CE Hold Time
Write Pulse Width
Write Pulse Width High
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
70
0
40
40
0
0
0
0
40
20
90
0
45
45
0
0
0
0
45
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
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