PWM Controller
Pin Function Description
Pin Number
1
Function
OUTB
Description
AS2916
This is the gate drive output for the Main FET. The totem pole
output has equivalent of an extra 10
Ω
resistor to limit the FET
turn on speed and a pull down resistor to ensure the FET gate
is never open. No external circuitry except for the FET is
expected on this pin. The largest FET expected to be driven is
IRFBC40. If a larger power FET is used, a buffer might be
required.
Positive supply for the IC. Absolute maximum rating is 20 V.
The running voltage shall be provided by the Auxiliary conver
tor.
Output of 5 V series regulator.
This is the Main convertor current sense pin. An external RC
filter from the Main power FET and slope compensation resis-
tor from the RAMP pin is all the expected external circuitry.
This is the Main output control pin. An opto isolated control
signal from the secondary side error amplifier is buffered and
connected to the invert pin of the main output current mode
comparator. A pull-up current of 1 mA is provided so the only
external circuitry expected is a common emitter opto-isolator.
This pin provides a 6 µA current source to linearly charge an
external capacitor. This spin is compared to the RAMP pin in
the soft start comparator, terminating output pulses when
RAMP goes above the SS voltage. While this pin is held low,
the main output is inhibited.
This pin is a level-shifted and buffered oscillator waveform,
used to provide slope compensation for the Main and Auxiliary
converters. The pin also serves as the non-inverting input of
the soft-start comparator.
Oscillator frequency and maximum duty cycle are set by con-
necting the resistor (RT) to VREG and a capacitor (CT) to
ground.
Provides an FM modulation of the oscillator, approximately
±25% deviation frequency, at a modulation rate set by an exter-
nal cap at WBL. Shorting to GND eliminates modulation.
This pin is used to remotely turn the main convertor ON/OFF
either for normal user application or for protection.
Bulk OK. This is a brownout protection feature. The pin moni-
tors the bulk voltage through a resistor divider. When BOK
exceeds 2.5 V a 50 µA current is sourced from the pin for hys-
teresis. When the pin drops below 2.5 V the hysteresis is
turned off and SS is pulled low,inhibiting the main output.
The Auxiliary output is not tied to BOK and will run as long as
there is sufficient bias voltage.
2
VCC
3
4
REG
SNSB
5
CMPB
6
SS
7
RAMP
8
OSC
9
WBL
10
11
ON
BOK
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AS2916
Pin Function Description
Pin Number
12
Function
CMPA
Description
PWM Controller
This is the Auxiliary convertor error amplifier compensation pin
or if secondary controller is desired, the Auxiliary control input
pin. A simple capacitor to ground is the only circuitry expected.
Note: There is no external connection for voltage feedback.
Voltage sensing is provided internally in such a way that VCC
not loaded until it reaches predefined threshold. If secondary
control is required, it can be forced into the CMPA pin.
is
13
SNSA
This is the Auxiliary convertor current sense pin. An external
RC filter from the Auxiliary power FET and slope compensation
resistor from the RAMP pin is all the expected external cir-
cuitry.
This is the gate drive output for the Auxiliary FET. The totem
pole output has equivalent of an extra 33
Ω
resistor to limit the
FET turn on speed and a pull down resistor to ensure the FET
gate is never open. No external circuitry except for the FET is
expected on this pin. The largest FET expected to be driven is
IRF820. If a larger power FET is used, a buffer might be
required.
Signal ground.
Power ground.
14
OUTA
15
16
GND
PGND
Absolute Maximum Ratings
Parameter
Reference Current
Output Current
Supply Voltage
Output Voltage
Continuous Power
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Symbol
IREF
IOUT
VCC
VOUT
PD
TJ
TSTG
TL
Rating
200
1
20
20
500
150
–60 to +150
300
Unit
mA
A
V
V
mW
°C
°C
°C
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PWM Controller
Electrical Characteristics
AS2916
Electrical characteristics are guaranteed over the full junction temperature range (0-105°). Ambient temperature must be derated
based upon power dissipation and package thermal characteristics. The conditions are: VCC = 15 V, BOK = 3 V, ON = 3 V, RT =
680
Ω,
CT = 10 nF, and CWBL = 2.2 nF, unless otherwise specified. To override UVLO, VCC should be raised above UVLOHIGH
prior to test.
Parameter
5 V Regulator
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Long-Term Stability
Output Noise Voltage
Maximum Source Current
Oscillator
Initial Frequency
Voltage Stability
Temperature Stability
Amplitude
Upper Trip Point
Lower Trip Point
Discharge Current
Duty Cycle Limit
Over-Temperature Shutdown
Wobble Oscillator
Wobble Rate
OSC Frequency Deviation
Amplitude
Upper Trip Point
Lower Trip Point
Charge Current
Discharge Current
FWBL
DEV
VWBL
VH
VL
ICHRG
IDSC
2.2 nF WBL to GND
Change in main oscillator freq.
VWBL peak-to-peak
3.4
+30
4.5
+40
1.8
2.7
0.9
VWBL = 0.7 V
VWBL = 4.8 V
–25
25
–36
36
–50
50
6.0
+50
kHz
kHz
V
V
V
µA
µA
TOT
TCF
VOSC
VH
VL
IDSC
fOSC
TA = 25°C, VWBL = 0 V
8.5 V
≤
VCC
≤
18V
TMIN
≤
TJ
≤
TMAX
VOSC peak-to-peak
VWBL = 0 V
VWBL = 0 V
VOSC = 3 V
RT = 680
Ω,
CT = 10 nF,
TJ = 25°C
7.5
46
117
132
0.2
5
1.55
2.8
1.25
8.7
50
140
9.5
54
143
1.0
kHz
%
%
V
V
V
mA
%
°C
VNOISE
IMAX
TCREG
Line, Load, Temperature
Over 1,000 hrs at 25°C
10
≤
f
≤
100 kHz, TJ = 25°C
VREG = 4.8 V
4.85
5.0
50
30
120
180
VREG
PSRR
TJ = 25°C, IREG = 1 mA
12
≤
VCC
≤
18 V
1.0
≤
IREG
≤
20 mA
4.90
5.00
5
5
0.2
5.10
15
15
0.4
5.15
25
V
mV
mV
mV/°C
V
mV
µV
mA
Symbol
Test Condition
Min.
Typ.
Max.
Unit
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Embedded System
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