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PDM31256SA15TTY

Description
Standard SRAM, 32KX8, 15ns, CMOS, PDSO28
Categorystorage    storage   
File Size301KB,7 Pages
ManufacturerParadigm Technology Inc
Download Datasheet Parametric View All

PDM31256SA15TTY Overview

Standard SRAM, 32KX8, 15ns, CMOS, PDSO28

PDM31256SA15TTY Parametric

Parameter NameAttribute value
MakerParadigm Technology Inc
package instruction,
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time15 ns
JESD-30 codeR-PDSO-G28
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal locationDUAL
Base Number Matches1
PDM31256
3.3V 256K Static RAM
32K x 8-Bit
Features
n
1
2
3
4
5
6
Description
The PDM31256 is a high-performance CMOS static
RAM organized as 32,768 x 8 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WE remains HIGH
and CE and OE are both LOW.
The PDM31256 operates from a single +3.3V power
supply and all the inputs and outputs are fully TTL-
compatible.
The PDM31256 is available in a 28-pin 300-mil
plastic SOJ and a 28-pin plastic TSOP (I).
High-speed access times
Com’l: 10, 12, 15 and 20ns
Ind’l: 12, 15 and 20ns
Low power operation (typical)
- PDM31256SA
Active: 200 mW
Standby: 15mW
Single +3.3V (±0.3V) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - SO
Plastic TSOP (I) - T
n
n
n
n
Functional Block Diagram
7
A
0
A
14
Decoder
Memory
Matrix
Addresses
8
9
10
11
12
I/O
0
I/O
7
• • • • •
Input
Data
Control
Column I/O
CE
WE
OE
Control
Rev. 3.3 - 4/29/98
1
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