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74LCX32MTCX_NL

Description
LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14
Categorylogic    logic   
File Size519KB,11 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74LCX32MTCX_NL Overview

LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14

74LCX32MTCX_NL Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Codecompliant
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOR GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup5.5 ns
propagation delay (tpd)6.6 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74LCX32 Low Voltage Quad 2-Input OR Gate with 5V Tolerant Inputs
March 1995
Revised February 2005
74LCX32
Low Voltage Quad 2-Input OR Gate
with 5V Tolerant Inputs
General Description
The LCX32 contains four 2-input OR gates. The inputs tol-
erate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX32 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V–3.6V V
CC
specifications provided
s
5.5 ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
3.0V)
s
Power down high impedance inputs and outputs
s
r
24 mA output drive (V
CC
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds JEDEC 78 conditions
s
ESD performance:
Human body model
!
2000V
Machine model
!
150V
s
Leadless Pb-Free DQFN package
Ordering Code:
Order Number
74LCX32M
74LCX32MX_NL
(Note 2)
74LCX32SJ
74LCX32BQX
(Note 1)
74LCX32MTC
74LCX32MTCX_NL
(Note 2)
Package
Number
M14A
M14A
M14D
MLP014A
MTC14
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
DQFN package available in Tape and Reel only.
Note 2:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS012413
www.fairchildsemi.com

74LCX32MTCX_NL Related Products

74LCX32MTCX_NL 74LCX32MX_NL 74LCX32MTCX 74LCX32 74LCX32MTC
Description LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14 LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, QCC14 LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14 LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, QCC14 LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
Number of functions 4 4 4 4 4
Number of terminals 14 14 14 14 14
Maximum operating temperature 85 °C 85 °C 85 °C 85 Cel 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 Cel -40 °C
surface mount YES YES YES Yes YES
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING NO LEAD GULL WING
Terminal location DUAL DUAL DUAL QUAD DUAL
Is it lead-free? Lead free - Lead free - Lead free
Is it Rohs certified? conform to conform to conform to - conform to
Maker Fairchild Fairchild Fairchild - Fairchild
Parts packaging code TSSOP SOIC TSSOP - TSSOP
package instruction TSSOP, TSSOP14,.25 SOP, SOP14,.25 4.40 MM, LEAD FREE, MO-153, TSSOP-14 - 4.40 MM, LEAD FREE, MO-153, TSSOP-14
Contacts 14 14 14 - 14
Reach Compliance Code compliant compli compliant - compliant
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 - R-PDSO-G14
JESD-609 code e3 e3 e4 - e4
length 5 mm 8.6235 mm 5 mm - 5 mm
Load capacitance (CL) 50 pF 50 pF 50 pF - 50 pF
Logic integrated circuit type OR GATE OR GATE OR GATE - OR GATE
MaximumI(ol) 0.024 A 0.024 A 0.024 A - 0.024 A
Humidity sensitivity level 1 1 1 - 1
Number of entries 2 2 2 - 2
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code TSSOP SOP TSSOP - TSSOP
Encapsulate equivalent code TSSOP14,.25 SOP14,.25 TSSOP14,.25 - TSSOP14,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL - RAIL
Peak Reflow Temperature (Celsius) 260 260 NOT SPECIFIED - NOT SPECIFIED
power supply 3.3 V 3.3 V 3.3 V - 3.3 V
Prop。Delay @ Nom-Sup 5.5 ns - 5.5 ns - 5.5 ns
propagation delay (tpd) 6.6 ns 6.6 ns 6.6 ns - 6.6 ns
Certification status Not Qualified Not Qualified Not Qualified - Not Qualified
Schmitt trigger NO NO NO - NO
Maximum seat height 1.2 mm 1.753 mm 1.2 mm - 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 2 V 2 V 2 V - 2 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V - 2.5 V
technology CMOS CMOS CMOS - CMOS
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) - Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal pitch 0.65 mm 1.27 mm 0.65 mm - 0.65 mm
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED
width 4.4 mm 3.9 mm 4.4 mm - 4.4 mm
Base Number Matches 1 1 1 - 1

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