DS1248W-120IND- datasheet, PDF

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DS1248W-120IND-: DescriptionReal Time Clock 1024k NV SRAM w/Phantom Clock; Categorysemiconductor Analog mixed-signal IC; File Size524KB，19 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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Real Time Clock 1024k NV SRAM w/Phantom Clock

DS1248W-120IND- Parametric

Parameter Name	Attribute value
Product Attribute	Attribute Value
Manufacturer	Maxim
Product Category	Real Time Clock
RoHS	Details
Mounting Style	Through Hole
Package / Case	EDIP-32
RTC Bus Interface	Parallel
Date Format	DW:DM:M:Y
Time Format	HH:MM:SS:hh
Battery Backup Switching	Backup Switching
RTC Memory Size	128 kB
Supply Voltage - Max	3.63 V
Supply Voltage - Min	2.97 V
Minimum Operating Temperature	- 40 C
Maximum Operating Temperature	+ 85 C
Packaging	Tube
Function	Calendar, Clock, NV Timekeeping RAM
Product	Real Time Clocks
NumOfPackaging	1
Operating Supply Current	85 mA
Factory Pack Quantity	10

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19-6078; Rev 11/11

1024K NV SRAM with Phantom Clock

FEATURES



DS1248/DS1248P

Real-Time Clock (RTC) Keeps Track of

Hundredths of Seconds, Minutes, Hours,

Days, Date of the Month, Months, and Years

128K x 8 NV SRAM Directly Replaces

Volatile Static RAM or EEPROM

Embedded Lithium Energy Cell Maintains

Calendar Operation and Retains RAM Data

Watch Function is Transparent to RAM

Operation

Automatic Leap Year Compensation Valid

Up to 2100

Full 10% Operating Range

Over 10 Years of Data Retention in the

Absence of Power

Lithium Energy Source is Electrically

Disconnected to Retain Freshness Until

Power is Applied for the First Time

DIP Module Only

Standard 32-Pin JEDEC Pinout

PIN CONFIGURATIONS

TOP VIEW

RST

A16

A14

A12

DQ0

DQ1

DQ2

GND

DS1248

A15

N.C.

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3



Encapsulated DIP

(740-mil Flush)



Underwriters Laboratories (UL) Recognized

(www.maxim-ic.com/qa/info/ul/)

PowerCap Module Board Only

Surface Mountable Package for Direct

Connection to PowerCap Containing

Battery and Crystal

Replaceable Battery (PowerCap)

Pin-for-Pin Compatible with DS1244P and

DS1251P

RST

A15

A16

N.C.

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

DS1248P

GND

BAT

N.C.

A14

A13

A12

A11

A10

PowerCap Module Board

(Uses DS9034PCX+ PowerCap)

1 of 19

DS1248/DS1248P 1024K NV SRAM with Phantom Clock

PHANTOM CLOCK OPERATION

Communication with the phantom clock is established by pattern recognition on a serial bit stream of

64 bits, which must be matched by executing 64 consecutive write cycles containing the proper data on

DQ0. All accesses that occur prior to recognition of the 64-bit pattern are directed to memory.

After recognition is established, the next 64 read or write cycles either extract or update data in the

phantom clock, and memory access is inhibited.

Data transfer to and from the timekeeping function is accomplished with a serial bit stream under control

of chip enable, output enable, and write enable. Initially, a read cycle to any memory location using the

and

control of the phantom clock starts the pattern recognition sequence by moving a pointer to

the first bit of the 64-bit comparison register. Next, 64 consecutive write cycles are executed using the

and

control of the SmartWatch. These 64 write cycles are used only to gain access to the phantom

clock. Therefore, any address to the memory in the socket is acceptable. However, the write cycles

generated to gain access to the phantom clock are also writing data to a location in the mated RAM. The

preferred

way

manage

this

requirement

set

aside

just

one address location in RAM as a phantom clock scratch pad. When the first write cycle is executed, it is

compared to bit 0 of the 64-bit comparison register. If a match is found, the pointer increments to the next

location of the comparison register and awaits the next write cycle. If a match is not found, the pointer

does not advance and all subsequent write cycles are ignored. If a read cycle occurs at any time during

pattern recognition, the present sequence is aborted and the comparison register pointer is reset. Pattern

recognition continues for a total of 64 write cycles as described above until all the bits in the comparison

data transfer to or from the timekeeping registers can proceed. The next 64 cycles will cause the phantom

clock to either receive or transmit data on DQ0, depending on the level of the

pin or the

pin.

Cycles to other locations outside the memory block can be interleaved with

cycles without

interrupting the pattern recognition sequence or data transfer sequence to the phantom clock.

PHANTOM CLOCK REGISTER INFORMATION

The phantom clock information is contained in eight registers of 8 bits, each of which is sequentially

accessed 1 bit at a time after the 64-bit pattern recognition sequence has been completed. When updating

the phantom clock registers, each register must be handled in groups of 8 bits. Writing and reading

individual bits within a register could produce erroneous results. These read/write registers are defined in

Figure 2.

Data contained in the phantom clock register is in binary-coded decimal format (BCD). Reading and

writing the registers is always accomplished by stepping through all eight registers, starting with bit 0 of

5 of 19

DS1248W-120IND- Related Products

	DS1248W-120IND-	DS1248Y-70-	CC5-2230AAKSANKTS	CC5-42701BKSANHTS	CSC12A03866KFPA
Description	Real Time Clock 1024k NV SRAM w/Phantom Clock	Real Time Clock 1024k NV SRAM w/Phantom Clock	Fixed Resistor, Thin Film, 0.4W, 223ohm, 200V, 0.05% +/-Tol, -100,100ppm/Cel, 1010,	Fixed Resistor, Thin Film, 0.4W, 42700ohm, 200V, 0.1% +/-Tol, -100,100ppm/Cel, 1010,	Res Net,Thick Film,866K Ohms,100WV,1% +/-Tol,-100,100ppm TC
Is it Rohs certified?	-	-	conform to	conform to	incompatible
Objectid	-	-	279604989	279644961	941620859
Reach Compliance Code	-	-	compliant	compliant	compliant
ECCN code	-	-	EAR99	EAR99	EAR99
YTEOL	-	-	8.25	7.75	5.44
structure	-	-	Chip	Chip	Rectangular
Number of terminals	-	-	2	2	12
Maximum operating temperature	-	-	125 °C	125 °C	125 °C
Minimum operating temperature	-	-	-55 °C	-55 °C	-55 °C
Package height	-	-	0.254 mm	0.254 mm	4.95 mm
Package length	-	-	2.54 mm	2.54 mm	30.23 mm
Package form	-	-	SMT	SMT	SIP
Package width	-	-	2.54 mm	2.54 mm	2.49 mm
method of packing	-	-	TR	TR	Bulk
Rated power dissipation(P)	-	-	0.4 W	0.4 W	0.3 W
resistance	-	-	223 Ω	42700 Ω	866000 Ω
Resistor type	-	-	FIXED RESISTOR	FIXED RESISTOR	FIXED RESISTOR
technology	-	-	THIN FILM	THIN FILM	METAL GLAZE/THICK FILM
Temperature Coefficient	-	-	100 ppm/°C	100 ppm/°C	100 ppm/°C
Terminal surface	-	-	Aluminum (Al)	Aluminum (Al)	Tin/Lead (Sn/Pb)
Tolerance	-	-	0.05%	0.1%	1%
Operating Voltage	-	-	200 V	200 V	100 V

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