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AS6C3216-55TIN

Description
SRAM 32M, 3V, 55ns 2048K x 16 Asyn SRAM
Categorystorage    storage   
File Size438KB,13 Pages
ManufacturerAlliance Memory
Environmental Compliance
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AS6C3216-55TIN Overview

SRAM 32M, 3V, 55ns 2048K x 16 Asyn SRAM

AS6C3216-55TIN Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAlliance Memory
Parts packaging codeTSOP1
package instructionTSOP1, TSSOP48,.8,20
Contacts48
Reach Compliance Codecompliant
Factory Lead Time16 weeks
Maximum access time55 ns
Spare memory width8
I/O typeCOMMON
JESD-30 codeR-PDSO-G48
JESD-609 codee3/e6
length18.4 mm
memory density33554432 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP48,.8,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3/3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.002 A
Minimum standby current1.2 V
Maximum slew rate0.08 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfacePURE MATTE TIN/TIN BISMUTH
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width12 mm
Base Number Matches1
AS6C3216
Rev. 1.0
32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Description
Initial Issue
Issue Date
Sep.06.2012
Alliance Memory, Inc.
0

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AS6C3216-55TIN AS6C3216-55TINTR
Description SRAM 32M, 3V, 55ns 2048K x 16 Asyn SRAM SRAM 32M, 3V, 55ns 2048K x 16 Asyn SRAM
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