TENTATIVE
TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB31356AFL
TB31356AFL
1.8GHz,600MHz DUAL-PLL FREQUENCY SYNTHESIZER
The TB31356AFL is a PLL synthesizer used for application
of the digital mobile communication and similar other
applications.
The
device
features
two
independently-controllable, built-in PLLs.
FEATURES
l
Operating frequency
l
l
l
l
PLL1 : 700 to 1800MHz
PLL2 : 40 to 600MHz
Current consumption Total : 3.7mA(PLL1+PLL2+XIN)
(Typ.)
PLL1 : 2.7mA (PLL1+XIN) (Typ.)
PLL2 : 1.1mA (PLL2+XIN) (Typ.)
(XIN=0.1mA Typ.)
Operating voltage
: 2.4 to 3.3V
Independent battery save supported
Compact leadless package : QON16pin(0.65mm pitch)
LPF
12
STB
DATA
CLK
BS-PLL1
13
14
15
16
64/65
PLL1
11
10
VCC-PLL2
9
8
7
6
5
4
VCC-PLL1
QON16-P-0404-0.65
Weight : 0.04g (Typ.)
BLOCK DIAGRAM
16/17
PLL2
TCXO
LA
LD
BS-PLL2
1
2
3
LPF
000630EBA1
•
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless,semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide
for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
•
The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshib products are
a
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (
“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document
shall be made at the customer’s own risk.
•
The products described in this document are subject to the foreign exchange and foreign trade laws.
•
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual propery or other rights of TOSHIBA CORPORATION or
t
others.
•
The information contained herein is subject to change without notice.
Nov. 27, 2002 PAGE 1
TENTATIVE
PIN FUNCTION (The value of resistor and capacitor are typical.)
PIN
FUNCTION
No. PIN NAME
TB31356AFL
INTERNAL EQUIVALENT
CIRCUIT
VCC
16KΩ
1KΩ
1
FIN1
PLL1 prescaler input pin. Inputs
frequency from VCO.
1
GND
2
GND
Ground pin.
VCC
-
3
CP1
Charge pump output pin for PLL1.
Constant current output.
3
GND
4
VCC-PLL1
Power supply pin (PLL1).
5
-
5
BS-PLL2
PLL2 battery saving pin.
1KΩ
GND
Lock detection output pin. Open drain
output. PLL to be detected can be
switched by serial data.
GND
7
6
1KΩ
6
LD
7
LA
PLL2 setting frequency switch pin.
1KΩ
GND
VCC
8
XIN
Reference oscillator input pin.
8
GND
9
VCC-PLL2
Power supply pin (PLL2).
-
This specification is design target. It is subject to change without notice
.
Nov. 27 2002 PAGE 2
TENTATIVE
TB31356AFL
PIN
No.
PIN
NAME
FUNCTION
VCC
INTERNAL EQUIVALENT
CIRCUIT
10
CP2
Charge pump output pin for PLL2.
Constant current output.
10
GND
11
GND
Ground pin.
-
VCC
24KΩ
1KΩ
12
FIN2
PLL2 prescaler input pin. Inputs
Frequency from VCO.
12
GND
13
14
15
16
STB
DATA
CLK
BS-PLL1
Strobe input pin.
Data input pin.
Clock input pin.
PLL1 battery saving pin.
N
1KΩ
GND
N=13,14,15,16
This specification is design target. It is subject to change without notice
.
Nov. 27 2002 PAGE 3
TENTATIVE
DESCRIPTION OF FUNCTION AND OPERATION
(1) Serial data control
TB31356AFL
TB31356AFL operates according to serial data program. Serial data is input from the clock (CLK),
data (DATA), and strobe (STB) pin.
(2)
l
Entry of serial data
At the rising edge of each clock pulse, data is sent to the internal shift register from the LSB
sequentially. When all the data is sent, set the strobe pin to high. At this rising edge,
data is stored in latches depending on the control contents. At the same time as data is
stored, control starts.
The CLK, DATA, and STB pin contain the schmitt trigger circuit to prevent the data
errors by noise, etc.
At power on, send the option control data before any other divider data.
l
l
(3) Serial data input timing
=>0.1µs
=>0.04µs
CLK
DATA
=>0.04µs
=>0.02µs
=>0.02µs
STB
=>0.04µs
=>0.04µs
(4) Serial data groups and group code
l
The IC has control divided into five groups so that they may be controlled independent of
one another. Each group is identified by three-bit group code attached at the data end.
Bit before
preceding one
0
0
0
0
1
Preceding bit
0
1
0
1
0
Last bit
0
0
1
1
0
Control contents
PLL1 programmable divider (FIN1) data
PLL2 programmable divider (FIN2) data
PLL1 reference divider (XIN) data
PLL2 reference divider (XIN) data
Option Control
This specification is design target. It is subject to change without notice
.
Nov. 27 2002 PAGE 4
TENTATIVE
(5) PLL1 divider data
l
l
TB31356AFL
Consist of a 6-bit swallow counter (programmable counter), a 12-bit programmable counter, and
a 1/64, 1/65 two modulus prescaler.
By sending any data to the swallow counter and programmable counter, number of division can
be set from 4032 to 262143.
A5 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 SB1 SB2 SBX 0 0 0
Programmable counter : N
Battery saving
Group code
LSB
A0 A1 A2 A3 A4
Swallow counter : A
Number of divisions = 64N+A (4032 =< Number of divisions =< 262143)
1
5
A=A0+A1*2 .......+A5*2
A : Value of A counter
1
11
N=D0+D1*2 +.......+D11*2
N : Value of N counter
(6) PLL2 divider data
Consist of a 4-bit swallow counter (programmable counter), a 11-bit programmable counter, and
a 1/16, 1/17 two modulus prescaler.
l
By sending any data to the swallow counter and programmable counter, number of division can
be set from 240 to 32767.
LSB
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 LA SB1 SB2 SBX 0
Swallow counter : A
Programmable counter : N
l
1
0
Battery saving
Group code
Number of divisions = 16N+A (240 =< Number of divisions =< 32767)
1
3
A=A0+A1*2 .......+A3*2
A : Value of A counter
1
10
N=D0+D1*2 +.......+D10*2
N : Value of N counter
(7) PLL1 reference divider data
l
l
Consist of a 12-bit reference counter (programmable counter).
By sending any data to the reference counter, number of division can be set from 4 to 4095
LSB
0
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 SB1 SB2 SBX 0
Reference counter
D=D0+D1*2 +.........D11*2
4 =< Number of divisions =< 4095
1
11
1
Battery saving
Group code
This specification is design target. It is subject to change without notice
.
Nov. 27 2002 PAGE 5
京公网安备 11010802033920号
EEWORLD
