MCIMX6S5DVM10AC datasheet, PDF

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MCIMX6S5DVM10AC: DescriptionProcessors - Application Specialized i.MX 6 series 32-bit MPU, ARM Cortex-A9 core, 1GHz, MAPBGA 624; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，169 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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MCIMX6S5DVM10AC Overview

Processors - Application Specialized i.MX 6 series 32-bit MPU, ARM Cortex-A9 core, 1GHz, MAPBGA 624

MCIMX6S5DVM10AC Parametric

Parameter Name	Attribute value
Brand Name	Freescale
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
package instruction	LFBGA,
Reach Compliance Code	compliant
ECCN code	5A992
Samacsys Description	Processors - Application Specialized MCIMX6S5DVM10AC/LFBGA624///STANDARD MARKING * TRAY
Address bus width	16
boundary scan	YES
External data bus width	32
Format	FIXED POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B2240
JESD-609 code	e1
length	21 mm
low power mode	YES
Humidity sensitivity level	3
Number of terminals	2240
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Maximum seat height	1.5 mm
speed	1000 MHz
surface mount	YES
technology	CMOS
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	21 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMX6SDLAEC

Rev. 8, 09/2017

MCIMX6SxAxxxxxB MCIMX6UxAxxxxxB

MCIMX6SxAxxxxxC MCIMX6UxAxxxxxC

MCIMX6SxAxxxxxD MCIMX6UxAxxxxxD

i.MX 6Solo/6DualLite

Automotive and

Infotainment

Applications Processors

Package Information

Plastic Package

BGA Case 2240 21 x 21 mm, 0.8 mm pitch

Ordering Information

See

Table 1 on page 3

Introduction

The i.MX 6Solo/6DualLite automotive and infotainment

processors represent the latest achievement in integrated

multimedia-focused products offering high-performance

processing with a high degree of functional integration.

These processors are designed considering the needs of

the growing automotive infotainment, telematics, HMI,

and display-based cluster markets.

The processors feature advanced implementation of

single/dual ARM

Cortex

-A9 core, which operates at

speeds of up to 1 GHz. They include 2D and 3D graphics

processors, 1080p video processing, and integrated

power management. Each processor provides a 32/64-bit

DDR3/DDR3L/LPDDR2-800 memory interface and a

number of other interfaces for connecting peripherals,

such as WLAN, Bluetooth

, GPS, hard drive, displays,

and camera sensors.

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .3

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

1.3 Updated Signal Naming Convention . . . . . . . . . . . .9

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . .10

2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.1 Special Signal Considerations . . . . . . . . . . . . . . . .21

3.2 Recommended Connections for Unused Analog

Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .23

4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . .23

4.2 Power Supplies Requirements and Restrictions. . .33

4.3 Integrated LDO Voltage Regulator Parameters . . .34

4.4 PLL’s Electrical Characteristics. . . . . . . . . . . . . . . .37

4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . .38

4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . .39

4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . .45

4.8 Output Buffer Impedance Parameters . . . . . . . . . .49

4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . .52

4.10 General-Purpose Media Interface (GPMI) Timing .64

4.11 External Peripheral Interface Parameters. . . . . . . .72

Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . .134

5.1 Boot Mode Configuration Pins . . . . . . . . . . . . . . .134

5.2 Boot Device Interface Allocation. . . . . . . . . . . . . .135

Package Information and Contact Assignments . . . . . .136

6.1 Updated Signal Naming Convention . . . . . . . . . .136

6.2 21x21 mm Package Information . . . . . . . . . . . . . .137

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163

Introduction

The i.MX 6Solo/6DualLite processors are specifically useful for applications such as:

• Automotive navigation and entertainment

• Graphics rendering for Human Machine Interfaces (HMI)

• High-performance speech processing with large databases

• Audio playback

• Video processing and display

The i.MX 6Solo/6DualLite applications processors feature:

• Multilevel memory system—The multilevel memory system of each processor is based on the L1

instruction and data caches, L2 cache, and internal and external memory. The processors support

many types of external memory devices, including DDR3, DDR3L, LPDDR2, NOR Flash,

PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and managed NAND,

including eMMC up to rev 4.4/4.41.

• Smart speed technology—The processors have power management throughout the IC that enables

the rich suite of multimedia features and peripherals to consume minimum power in both active

and various low power modes. Smart speed technology enables the designer to deliver a

feature-rich product, requiring levels of power far lower than industry expectations.

• Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices

by scaling the voltage and frequency to optimize performance.

• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a

multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a multi-standard

hardware video codec, an image processing unit (IPU), a programmable smart DMA (SDMA)

controller, and an asynchronous sample rate converter.

• Powerful graphics acceleration—Each processor provides two independent, integrated graphics

processing units: an OpenGL

ES 2.0 3D graphics accelerator with a shader and a 2D graphics

accelerator.

• Interface flexibility—Each processor supports connections to a variety of interfaces: LCD

controller for up to two displays (including parallel display, HDMI1.4, MIPI display, and LVDS

display), dual CMOS sensor interface (parallel or through MIPI), high-speed USB on-the-go with

PHY, high-speed USB host with PHY, multiple expansion card ports (high-speed MMC/SDIO host

and other), 10/100/1000 Mbps Gigabit Ethernet controller two CAN ports, ESAI audio interface,

and a variety of other popular interfaces (such as UART, I

C, and I

S serial audio, and PCIe-II).

• Automotive environment support—Each processor includes interfaces, such as two CAN ports, an

MLB150/50 port, an ESAI audio interface, and an asynchronous sample rate converter for

multichannel/multisource audio.

• Advanced security—The processors deliver hardware-enabled security features that enable secure

e-commerce, digital rights management (DRM), information encryption, secure boot, and secure

software downloads. The security features are discussed in detail in the

i.MX 6Solo/6DualLite

Security Reference Manual

(IMX6DQ6SDLSRM).

• Integrated power management—The processors integrate linear regulators and internally generate

voltage levels for different domains. This significantly simplifies system power management

structure.

i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 8, 09/2017

NXP Semiconductors

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