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MC14069UBDTR2

Description
Inverters 3-18V CMOS Hex
Categorylogic    logic   
File Size138KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC14069UBDTR2 Overview

Inverters 3-18V CMOS Hex

MC14069UBDTR2 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeTSSOP
package instructionLEAD FREE, TSSOP-14
Contacts14
Reach Compliance Codeunknown
Is SamacsysN
series4000/14000/40000
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeINVERTER
Humidity sensitivity level1
Number of functions6
Number of entries1
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5/15 V
Prop。Delay @ Nom-Sup125 ns
propagation delay (tpd)125 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)18 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width4.4 mm
Base Number Matches1
MC14069UB
Hex Inverter
The MC14069UB hex inverter is constructed with MOS P−channel
and N−channel enhancement mode devices in a single monolithic
structure. These inverters find primary use where low power
dissipation and/or high noise immunity is desired. Each of the six
inverters is a single stage to minimize propagation delays.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
P SUFFIX
CASE 646
1
14
SOIC−14
D SUFFIX
CASE 751A
1
14
14069UG
AWLYWW
MC14069UBCP
AWLYYWWG
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−Power TTL Loads or One
Low−Power Schottky TTL Load Over the Rated Temperature
Range
Triple Diode Protection on All Inputs
Pin−for−Pin Replacement for CD4069UB
Meets JEDEC UB Specifications
These Devices are Pb−Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation, per Package
(Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
Value
−0.5
to +18.0
−0.5
to V
DD
+ 0.5
±10
500
−55
to +125
−65
to +150
260
Unit
V
V
mA
mW
°C
°C
°C
SOEIAJ−14
F SUFFIX
CASE 965
1
TSSOP−14
DT SUFFIX
CASE 948G
14
069U
ALYWG
G
1
14
MC14069UB
ALYWG
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
G
©
Semiconductor Components Industries, LLC, 2013
May, 2013
Rev. 10
1
Publication Order Number:
MC14069UB/D

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Description Inverters 3-18V CMOS Hex Fixed Resistor, Thin Film, 0.4W, 223ohm, 200V, 0.05% +/-Tol, -100,100ppm/Cel, 1010, Fixed Resistor, Thin Film, 0.035W, 18400ohm, 100V, 0.5% +/-Tol, -50,50ppm/Cel, 0202, Inverters 3-18V CMOS Hex
Reach Compliance Code unknown compliant unknown not_compliant
series 4000/14000/40000 CC5 CC8 4000/14000/40000
Number of terminals 14 2 2 14
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMT SMT IN-LINE
technology CMOS THIN FILM THIN FILM CMOS
Is it Rohs certified? conform to conform to - incompatible
JESD-609 code e4 e4 - e0
method of packing TAPE AND REEL Waffle Pack Waffle Pack -
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Gold (Au) - Tin/Lead (Sn80Pb20)
ECCN code - EAR99 EAR99 EAR99
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