Burr Brown Products
from Texas Instruments
PCM3052A
SLES160 – NOVEMBER 2005
24-BIT, 96-kHz STEREO AUDIO CODEC WITH
MICROPHONE AMPLIFIER, BIAS, MUXTIPLEXER, AND PGA
FEATURES
•
Microphone Amplifier and Bias
– Monaural Microphone Amplifier: 34-dB Gain
at Differential Input
– Microphone Bias: 1 mA at 3.75 V
Multiplexer and PGA
– Multiplex of Stereo Single-Ended Line
Inputs and Monaural Microphone Amplifier
– 0.1 Vrms to 1.5 Vrms Full-Scale Input Range
– 22-kΩ Input Resistance at 0.1-Vrms Input
– 20 dB to –4 dB/range, 1 dB/step PGA
Reference Output:
±10
mA at 2.5 V
24-Bit Delta-Sigma ADC and DAC
Stereo ADC:
– Full-Scale Input: 3 Vp-p
– Antialiasing Filter Included
– 1/64 Decimation Filter:
•
Pass-Band Ripple:
±0.05
dB
•
Stop-Band Attenuation: –65 dB
– On-Chip High-Pass Filter: 0.91 Hz at
f
S
= 48 kHz
– High Performance:
•
THD+N: –94 dB (Typical)
•
SNR: 101 dB (Typical)
•
Dynamic Range: 101 dB (Typical)
Stereo DAC:
– Single-Ended Voltage Output: 4 Vp-p
– Analog Low-Pass Filter Included
–
×8
Oversampling Digital Filter:
•
Pass-Band Ripple:
±0.03
dB
•
Stop-Band Attenuation: –50 dB
– High Performance:
•
THD+N: –97 dB (Typical)
•
SNR: 105 dB (Typical)
•
Dynamic Range: 104 dB (Typical)
S/PDIF Output for DAC Digital Input
A
•
Multiple Functions With I
2
C Interface:
– Digital De-Emphasis: 32-, 44.1-, 48-kHz
– Zipper-Noise-Free Digital Attenuation and
Soft Mute for DAC
– HPF Bypass Control for ADC
– S/PDIF Output Control
– Power Down: ADC/DAC Independently
External Power-Down Pin:
– ADC/DAC Simultaneously
Audio Data Format: 24-Bit I
2
S Only
Sampling Rate:
– 16–96 kHz for Both ADC and DAC
System Clock: 256 f
S
Only
Dual Power Supplies:
– 5 V for Analog and 3.3 V for Digital
Package: VQFN-32
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
The PCM3052A is a low-cost, single-chip, 24-bit
stereo audio codec (ADC and DAC) with
single-ended analog voltage input and output. It also
has an analog front end consisting of a 34-dB
microphone amplifier, microphone bias generator, 2
stereo multiplexers, and a wide-range PGA. Analog-
to-digital converters (ADCs) employ delta-sigma
modulation with 64-times oversampling. On the other
hand, digital-to-analog converters (DACs) employ
modulation with 64- and 128-times oversampling.
ADCs include a digital decimation filter with a
high-pass filter, and DACs include an 8-times
oversampling
digital
interpolation
filter.
The
PCM3052A has many functions which are controlled
using the I
2
C interface: DAC digital de-emphasis,
digital attenuation, soft mute etc. The PCM3052A
also has an S/PDIF output pin for the DAC digital
input. The power-down mode, which works on ADCs
and DACs simultaneously, is provided by an external
pin. The PCM3052A is suitable for a wide variety of
cost-sensitive PC audio (recorder and player)
applications where good performance is required.
The PCM3052A is fabricated using a highly advanced
CMOS process and is available in a small 32-pin
VQFN package.
•
•
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
PCM3052A
www.ti.com
SLES160 – NOVEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
PCM3052A
Supply voltage
Supply voltage differences
Ground voltage differences
Digital input voltage
Analog input voltage
V
CC
1, V
CC
2, V
CC
3
V
DD
V
CC
1, V
CC
2, V
CC
3
AGND1, AGND2, AGND3, DGND
PDWN, DIN, SCKI, SDA, SCL, ADR, I2CEN
DOUT, LRCK, BCK, DOUTS
V
IN
L, V
IN
R, V
REF
1, V
REF
2, REFO, ATEST, L/M, V
OUT
R, V
OUT
L, V
COM
,
MINP, MINM, MBIAS
–0.3 V to 6.5 V
–0.3 V to 4 V
±0.1
V
±0.1
V
–0.3 V to 6.5 V
– 0.3 V to (V
DD
+ 0.3 V) < 4 V
–0.3 V to (V
CC
+ 0.3 V) < 6.5 V
±10
mA
–40°C to 125°C
–55°C to 150°C
150°C
260°C, 5 s
260°C
Input current (any pins except supplies)
Ambient temperature under bias
Storage temperature
Junction temperature
Lead temperature (soldering)
Package temperature (reflow, peak)
(1)
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
V
DD
V
CC
Digital supply voltage
Analog supply voltage
Digital input logic family
System clock
Sampling clock
Line input, full scale, PGA = 0 dB
Microphone input, full scale, PGA = 0 dB
5
50
3.75
250
–40
85
4
16
3
30
20
3
4.5
NOM
3.3
5
TTL
compatible
25
96
MHz
kHz
Vp-p
mVp-p
pF
kΩ
pF
kΩ
Ω
°C
MAX
3.6
5.5
UNIT
V
V
Digital input clock frequency
Analog input voltage
Digital output load capacitance
Line output load resistance
Line output load capacitance
Microphone bias output load resistance
Reference output load resistance
T
A
Operating free-air temperature
2
PCM3052A
www.ti.com
SLES160 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= 25°C, V
CC
1 = V
CC
2 = V
CC
3 = 5 V, V
DD
= 3.3 V, f
S
= 48 kHz, SCKI = 256 f
S
, 24-bit data, unless
otherwise noted
PARAMETER
DIGITAL INPUT/OUTPUT – DATA FORMAT
Audio data interface format
Audio data bit length
Audio data format
f
S
Sampling frequency, ADC
Sampling frequency, DAC
System clock frequency
INPUT LOGIC
V
IH (1)
V
IL (1)
V
IH (2) (3)
V
IL(2) (3)
I
IH(2)
I
IL
I
IL
(2)
TEST CONDITIONS
MIN
TYP
I
2
S
24
MAX
UNIT
Bits
96
96
25
V
DD
0.8
5.5
0.8
±10
±10
kHz
kHz
MHz
MSB-first, 2s complement
16
16
256 f
S
4
2
2
V
IN
= V
DD
V
IN
= 0 V
V
IN
= V
DD
V
IN
= 0 V
I
OUT
= –4 mA
2.8
0.5
4.5
0.5
1
40
5
6
20
59
–77
0.75 V
CC
1
– 0.15
0.75 V
CC
1
+ 0.15
1
48
100 Hz–20 kHz, with 10-µF
decoupling
0.5 V
CC
1
– 0.15
1.8
15
65
48
48
Input logic level
Input logic level
Input logic current
Input logic current
VDC
VDC
µA
µA
I
IH(1)(3)
(1) (3)
100
±10
OUTPUT LOGIC
V
OH (4)
V
OL (4) (5)
V
OH (6)
V
OL
(6)
Output logic level
I
OUT
= 4 mA
I
OUT
= –0.3 mA
I
OUT
= 0.3 mA
VDC
VDC
MICROPHONE AMPLIFIER
Input level
Gain
Input resistance
Frequency response
SNR
THD+N
MICROPHONE BIAS GENERATOR
Output voltage
Output source current
Output impedance
Output noise voltage
REFERENCE OUTPUT
Output voltage
Output source/sink current
Output impedance
Output noise voltage
100 Hz–20 kHz, with 10-µF
decoupling
6
1.8
I
OUT
=
±10
mA
0.5 V
CC
1
0.5 V
CC
1
+ 0.15
10
V
mA
Ω
µVrms
I
OUT
= –1 mA
0.75 V
CC
1
V
mA
Ω
µVrms
Single-ended
Single-ended
Single-ended
–3 dB
1-kHz, 100-mVrms output
1-kHz, 1-Vrms output
mVrms
dB
kΩ
kHz
dB
dB
(1)
(2)
(3)
(4)
(5)
(6)
Pins 10, 11: LRCK, BCK (Schmitt-trigger input with 50-kΩ typical internal pulldown resistor)
Pins 12, 17, 18, 19, 21: DIN, SCKI, SDA, SCL, I2CEN (Schmitt-trigger input, 5-V tolerant)
Pins 9, 20 : PDWN, ADR (Schmitt-trigger input with 50-kΩ typical internal pulldown resistor, 5-V tolerant).
Pins 13, 14: DOUT, DOUTS
Pin 18: SDA (Open-drain LOW output)
Pin 3: L/M
3
PCM3052A
www.ti.com
SLES160 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T
A
= 25°C, V
CC
1 = V
CC
2 = V
CC
3 = 5 V, V
DD
= 3.3 V, f
S
= 48 kHz, SCKI = 256 f
S
, 24-bit data, unless
otherwise noted
PARAMETER
AFE MULTIPLEXER
Input channel
Input range for full scale
Input Impedance
Antialiasing filter frequency response
Input center voltage (VREF1)
AFE PGA
Gain range
Gain step
Monotonicity
ADC CHARACTERISTICS
Resolution
Full-scale input voltage
DC Accuracy
Gain mismatch, channe-to-channel
Gain error
Bipolar-zero error
Dynamic Performance
(7)
TEST CONDITIONS
MIN
TYP
2
MAX
UNIT
CH
V
IN
L, V
IN
R
V
IN
L, V
IN
R
–3 dB, PGA gain = 0 dB
0.1
22
1
143
300
0.5 V
CC
1
1.5
Vrms
kΩ
kHz
V
–4
0
1
Ensured
24
20
dB
dB
Bits
Vp-p
±2
±4
% of FSR
% of FSR
% of FSR
–88
dB
V
IN
L, V
IN
R at PGA gain = 0 dB
Full scale input, V
IN
L, V
IN
R
Full scale input, V
IN
L, V
IN
R
HPF bypass, V
IN
L, V
IN
R
f
S
= 48 kHz, V
IN
= –0.5 dB
0.6 V
CC
1
±1
±2
±2
–94
–89
–38
–38
95
95
92
92
101
101
101
101
98
99
98
99
0.454 f
S
0.583 f
S
±0.05
THD+N
Total harmonic distortion + noise
f
S
= 96 kHz, V
IN
= –0.5 dB
f
S
= 48 kHz, V
IN
= –60 dB
f
S
= 96 kHz, V
IN
= –60 dB
f
S
= 48 kHz, A-weighted
f
S
= 96 kHz, A-weighted
f
S
= 48 kHz, A-weighted
f
S
= 96 kHz, A-weighted
f
S
= 48 kHz
f
S
= 96 kHz
f
S
= 48 kHz
f
S
= 96 kHz
±0.05
dB
Dynamic range
S/N
Signal-to-noise ratio
Channel separation
(between L-ch and R-ch of line-in)
Channel separation
(between microphone and line-in)
Digital Filter Performance
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
HPF frequency response
DAC CHARACTERISTICS
Resolution
DC Accuracy
Gain mismatch, channel-to-channel
Gain error
Bipolar zero error
dB
dB
dB
dB
Hz
Hz
dB
dB
s
MHz
Bits
0.583 f
S
–3 dB
–65
17.4/f
S
0.019 f
S
24
±1
±2
±1
±2
±6
% of FSR
% of FSR
% of FSR
(7)
4
f
IN
= 1 kHz, using System Two™ audio measurement system by Audio Precision™ in the RMS mode with 20-kHz LPF and 400-Hz HPF
in the calculation, at PGA gain = 0 dB, for V
IN
L and V
IN
R.
PCM3052A
www.ti.com
SLES160 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T
A
= 25°C, V
CC
1 = V
CC
2 = V
CC
3 = 5 V, V
DD
= 3.3 V, f
S
= 48 kHz, SCKI = 256 f
S
, 24-bit data, unless
otherwise noted
PARAMETER
Dynamic Performance
(8)
TEST CONDITIONS
f
S
= 48 kHz, V
OUT
= 0 dB
MIN
TYP
–97
–99
–42
–43
MAX
–90
UNIT
THD+N
Total harmonic distortion + noise
f
S
= 96 kHz, V
OUT
= 0 dB
f
S
= 48 kHz, V
OUT
= –60 dB
f
S
= 96 kHz, V
OUT
= –60 dB
f
S
= 48 kHz, EIAJ, A-weighted
f
S
= 96 kHz, EIAJ, A-weighted
f
S
= 48 kHz, EIAJ, A-weighted
f
S
= 96 kHz, EIAJ, A-weighted
f
S
= 48 kHz
f
S
= 96 kHz
97
99
98
dB
Dynamic range
S/N
Signal-to-noise ratio
Channel separation
Analog Output
Output voltage
Center voltage
Load impedance
LPF frequency response
Digital Filter Performance
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
De-emphasis error
POWER SUPPLY REQUIREMENTS
V
CC
1
V
CC
2
V
CC
3
V
DD
104
106
105
106
103
104
0.8 V
CC
2
0.5 V
CC
2
dB
dB
dB
Vp-p
V
kΩ
AC coupling
f = 20 kHz
f = 40 kHz
±0.03
dB
5
–0.03
–0.20
0.454 f
S
0.546 f
S
±0.03
dB
Hz
Hz
dB
dB
s
dB
0.546 f
S
–50
20/f
S
±0.1
Voltage range
4.25
3
f
S
= 48 kHz
f
S
= 96 kHz
5
3.3
39
41
5.5
3.6
50
VDC
I
CC (9)
Supply current
I
DD
mA
µA
Full power down
f
S
= 48 kHz
f
S
= 96 kHz
(10)
300
10
19
90
228
268
180
63
1.8
300
15
mA
µA
Full power down
(10)
Operation, f
S
= 48 kHz
Operation, f
S
= 96 kHz
Power dissipation
ADC operation at f
S
= 48
kHz/DAC power down
ADC power down/DAC operation
at f
S
= 48 kHz
Full power down
(10)
mW
(8) f
OUT
= 1 kHz, using System Two audio measurement system by Audio Precision in the RMS mode with 20-kHz LPF and 400-Hz HPF.
(9) I
CC
= I
CC
1 + I
CC
2 + I
CC
3
(10) Halt SCKI, BCK, LRCK.
5
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