DG408L, DG409L
www.vishay.com
Vishay Siliconix
Precision 8-Ch / Dual 4-Ch Low Voltage Analog Multiplexers
DESCRIPTION
The DG408L, DG409L are low voltage pin-for-pin
compatible companion devices to the industry standard
DG408, DG409 with improved performance.
Using BiCMOS wafer fabrication technology allows the
DG408L, DG409L to operate on single and dual supplies.
Single supply voltage ranges from 3 V to 12 V while dual
supply operation is recommended with ± 3 V to ± 6 V.
The DG408L is an 8 channel single-ended analog
multiplexer designed to connect one of eight inputs to a
common output as determined by a 3 bit binary address (A
0
,
A
1
, A
2
). The DG409L is a dual 4 channel differential analog
multiplexer designed to connect one of four differential
inputs to a common dual output as determined by its 2 bit
binary address (A
0
, A
1
). Break-before-make switching action
to protect against momentary crosstalk between adjacent
channels.
The DG408L, DG409L provides lower on-resistance, faster
switching time, lower leakage, less power consumption, and
higher off-isolation than the DG408, DG409.
FEATURES
• Pin-for-pin compatibility with DG408, DG409
• 2.7 V to 12 V single supply or ± 3 V to ± 6 V dual
Available
supply operation
• Lower on-resistance: R
DS(on)
- 17
typ.
Available
• Fast switching: t
ON
- 38 ns, t
OFF
- 18 ns
• Break-before-make guaranteed
Available
• Low leakage: I
S(OFF)
- 0.2 nA max.
• Low charge injection: 1 pC
• TTL, CMOS, LV logic (3 V) compatible
• 82 dB off-isolation at 1 MHz
• 2000 V ESD protection (HBM)
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
BENEFITS
•
•
•
•
High accuracy
Single and dual power rail capacity
Wide operating voltage range
Simple logic interface
APPLICATIONS
•
•
•
•
•
•
•
Data acquisition systems
Battery operated equipment
Portable test equipment
Sample and hold circuits
Communication systems
SDSL, DSLAM
Audio and video signal routing
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS
DG408L
Dual-In- Line, SOIC, and TSSOP
A
0
EN
V-
S
1
S
2
S
3
S
4
D
A
1
A
2
GND
V+
S
5
S
6
S
7
S
8
DG409L
Dual-In- Line, SOIC, and TSSOP
A
0
A
1
GND
V+
S
1b
S
2b
S
3b
S
4b
D
b
1
2
3
4
5
6
7
8
Top View
Decoders/Drivers
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Top View
Decoders/Drivers
16
15
14
13
12
11
10
9
EN
V-
S
1a
S
2a
S
3a
S
4a
D
a
S16-0276-Rev. J, 22-Feb-16
Document Number: 71342
1
For technical questions, contact:
analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG408L, DG409L
www.vishay.com
Vishay Siliconix
TRUTH TABLE
(DG409L)
TRUTH TABLE
(DG408L)
A
2
X
0
0
0
0
1
1
1
1
A
1
X
0
0
1
1
0
0
1
1
A
0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
None
1
2
3
4
5
6
7
8
A
1
X
0
0
1
1
A
0
X
0
1
0
1
EN
0
1
1
1
1
ON SWITCH
None
1
2
3
4
Logic “0” = V
AL
0.8 V
Logic “1” = V
AH
2.4 V
X = do not care
Note
• For low and high voltage levels for V
AX
and V
EN
consult “Digital Control” parameters for specific V+ operation.
ORDERING INFORMATION
(DG408L)
TEMP. RANGE
PACKAGE
16-pin SOIC
-40 °C to +85 °C
16-pin TSSOP
PART NUMBER
DG408LDY
DG408LDY-E3
DG408LDY-T1
DG408LDY-T1-E3
DG408LDQ
DG408LDQ-E3
DG408LDQ-T1
DG408LDQ-T1-E3
ORDERING INFORMATION
(DG409L)
TEMP. RANGE
PACKAGE
16-pin SOIC
-40 °C to +85 °C
16-pin TSSOP
PART NUMBER
DG409LDY
DG409LDY-E3
DG409LDY-T1
DG409LDY-T1-E3
DG409LDQ
DG409LDQ-E3
DG409LDQ-T1
DG409LDQ-T1-E3
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage Referenced V+ to
GND
Digital Inputs
a
, V
S
, V
D
Current (any terminal)
Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.)
Storage Temperature
(A suffix)
(D suffix)
16-pin plastic TSSOP
c
Power Dissipation (package)
b
16-pin narrow SOIC
c
16-pin CerDIP
LCC-20
e
d
LIMIT
V-
e
14
7
(V-) - 0.3 to (V) + 0.3
30
100
-65 to +150
-65 to +125
650
600
900
750
UNIT
V
mA
°C
mW
Notes
a. Signals on S
X
, D
X
, A
X
, or EN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 7.6 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C
e. Derate 10 mW/°C above 75 °C
S16-0276-Rev. J, 22-Feb-16
Document Number: 71342
2
For technical questions, contact:
analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG408L, DG409L
www.vishay.com
Vishay Siliconix
SPECIFICATIONS
(Single Supply 12 V)
PARAMETER
SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 12 V, ± 10 %, V- = 0 V
V
EN
= 0.8 V or 2.4 V
f
A SUFFIX
D SUFFIX
-55 °C to +125 °C -40 °C to +85 °C
TEMP.
b
TYP.
d
MIN.
c
MAX.
c
MIN.
c
MAX.
c
UNIT
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
R
DS(on)
Matching
Between Channels
g
On-Resistance Flatness
i
Switch Off Leakage
Current
a
V
ANALOG
R
DS(on)
R
DS
R
FLAT(on)
I
S(off)
I
D(off)
Channel On Leakage
Current
a
Digital Control
Logic High Input Voltage
Logic Low Input Voltage
Input Current
Dynamic Characteristics
Transition Time
t
TRANS
t
OPEN
t
ON(EN)
t
OFF(EN)
Q
OIRR
X
TALK
C
S(off)
C
D(off)
C
D(on)
V
S1
= 8 V, V
S8
= 0 V, (DG408L)
V
S1b
= 8 V, V
S4b
= 0 V, (DG409L)
see figure 2
V
S(all)
= V
DA
= 5 V,
see figure 4
V
AX
= 0 V, V
S1
= 5 V (DG408L)
V
AX
= 0 V, V
S1b
= 5 V (DG409L)
see figure 3
C
L
= 1 nF, V
GEN
= 0 V,
R
GEN
= 0
f = 100 kHz, R
L
= 1 k
f = 1 MHz, V
S
= 0 V, V
EN
= 0 V
f = 1 MHz, V
D
= 2.4 V, V
EN
= 0 V
f = 1 MHz, V
D
= 0 V, V
EN
= 2.4 V
(DG409L only)
Room
Full
Room
Full
Room
Full
Room
Full
Room
Room
Room
Room
Room
Room
30
-
11
-
38
-
18
-
1
-70
-82
7
20
31
-
-
1
-
-
-
-
-
-
-
-
-
-
-
60
68
-
-
55
60
25
30
5
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
60
65
-
-
55
60
25
30
5
-
-
-
-
-
pF
pC
dB
ns
V
INH
V
INL
I
IN
V
AX
= V
EN
= 2.4 V or 0.8 V
Full
Full
Full
-
-
-
2.4
-
-1.5
-
0.8
1.5
2.4
-
-1
-
0.8
1
V
μA
I
D(on)
V
D
= 10.8 V, V
D
= 2 V or 9 V,
I
S
= 10 mA,
sequence each switch on
V
D
= 10.8 V, V
D
= 2 V or 9 V,
I
S
= 10 mA,
Full
Room
Full
Room
Room
Room
V
EN
= 0 V, V
D
= 11 V or 1 V,
V
S
= 1 V or 11 V
Full
Room
Full
V
S
= V
D
= 1 V or 11 V
Room
Full
-
17
-
1
3
-
-
-
-
-
-
0
-
-
-
-
-1
-15
-1
-15
-1
-15
12
29
38
3
7
1
15
1
15
1
15
-1
-10
-1
-10
-1
-10
0
-
-
-
12
29
35
3
7
1
10
1
10
1
10
nA
V
Break-Before-Make Time
Enable Turn-On Time
Enable Turn-Off Time
Charge Injection
e
Off Isolation
e, h
Crosstalk
e
Source Off Capacitance
e
Drain Off
Capacitance
e
e
Drain On Capacitance
Power Supplies
Power Supply Range
Power Supply Current
V+
I+
V
EN
= V
A
= 0 V or 5 V
Room
-
0.2
3
-
12
0.7
3
-
12
0.7
V
μA
Notes
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
g.
R
DS(on)
= R
DS(on)
max. - R
DS(on)
min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. R
DS(on)
flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
S16-0276-Rev. J, 22-Feb-16
Document Number: 71342
3
For technical questions, contact:
analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG408L, DG409L
www.vishay.com
Vishay Siliconix
SPECIFICATIONS
(Dual Supply V+ = 5 V, V - = -5 V)
PARAMETER
SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 5 V, ± 10 %, V- = -5 V
V
EN
= 0.6 V or 2.4 V
f
A SUFFIX
D SUFFIX
-55 °C to +125 °C -40 °C to +85 °C
TEMP.
b
TYP.
d
MIN.
c
MAX.
c
MIN.
c
MAX.
c
UNIT
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
V
ANALOG
R
DS(on)
I
S(off)
I
D(off)
Channel On Leakage
Current
a
Digital Control
Logic High Input Voltage
Logic Low Input Voltage
Input Current
a
Dynamic Characteristics
Transition Time
e
Break-Before-Make Time
e
Enable Turn-On Time
e
Enable Turn-Off Time
e
Source Off Capacitance
e
Drain Off
Capacitance
e
Drain On Capacitance
e
t
TRANS
t
OPEN
t
ON(EN)
t
OFF(EN)
C
S(off)
C
D(off)
C
D(on)
V
S1
= 3.5 V, V
S8
= 0 V, (DG408L)
V
S1b
= 3.5 V, V
S4b
= 0 V, (DG409L)
see figure 2
V
S(all)
= V
DA
= 3.5 V,
see figure 4
V
AX
= 0 V, V
S1
= 3.5 V (DG408L)
V
AX
= 0 V, V
S1b
= 3.5 V (DG409L)
see figure 3
f = 1 MHz, V
S
= 0 V, V
EN
= 0 V
f = 1 MHz, V
D
= 0 V, V
EN
= 0 V
f = 1 MHz, V
D
= 0 V, V
EN
= 2.4 V
Room
Full
Room
Full
Room
Full
Room
Full
Room
Room
Room
30
-
8
-
25
-
20
-
6
15
29
-
-
1
-
-
-
-
-
-
-
-
60
78
-
-
55
68
40
50
-
-
-
-
-
1
-
-
-
-
-
-
-
-
60
65
-
-
55
60
40
45
-
-
-
pF
ns
V
INH
V
INL
I
IN
V
AX
= V
EN
= 2.4 V or 0.6 V
Full
Full
Full
-
-
-
2.4
-
-1.5
-
0.6
1.5
2.4
-
-1
-
0.6
1
V
μA
I
D(on)
V
D
= ± 3.5 V, I
S
= 10 mA,
sequence each switch on
V+ = 5.5, V- = 5.5 V
V
EN
= 0 V, V
D
= ± 4.5 V,
V
S
= ± 4.5 V
V+ = 5.5 V, V- = -5.5 V,
V
EN
= 2.4 V, V
D
= ± 4.5 V,
V
S
= ± 4.5 V
Full
Room
Full
Room
Full
Room
Full
Room
Full
-
20
-
-
-
-
-
-
-
-5
-
-
-1
-15
-1
-15
-1
-15
5
40
50
1
15
1
15
1
15
-5
-
-
-1
-10
-1
-10
-1
-10
5
40
50
1
10
1
10
1
10
nA
V
Switch Off Leakage
Current
a
Notes
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
g.
R
DS(on)
= R
DS(on)
max. - R
DS(on)
min.
h. Worst case isolation occurs on channel 4 do to proximity to the drain pin.
i. R
DS(on)
flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
S16-0276-Rev. J, 22-Feb-16
Document Number: 71342
4
For technical questions, contact:
analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG408L, DG409L
www.vishay.com
Vishay Siliconix
SPECIFICATIONS
(Single Supply 5 V)
PARAMETER
SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 5 V, ± 10 %, V- = 0 V
V
EN
= 0.6 V or 2.4 V
f
A SUFFIX
D SUFFIX
-55 °C to +125 °C -40 °C to +85 °C
TEMP.
b
TYP.
d
MIN.
c
MAX.
c
MIN.
c
UNIT
MAX.
c
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
R
DS(on)
Matching Between
Channels
g
On-Resistance Flatness
i
Switch Off Leakage
Current
a
V
ANALOG
R
DS(on)
R
DS
R
FLAT(on)
I
S(off)
I
D(off)
Channel On Leakage
Current
a
Digital Control
Logic High Input Voltage
Logic Low Input Voltage
Input Current
a
Dynamic Characteristics
Transition Time
e
Break-Before-Make Time
e
Enable Turn-On Time
e
Enable Turn-Off Time
e
Charge Injection
e
Off Isolation
e, h
Crosstalk
e
Source Off Capacitance
e
Drain Off Capacitance
e
Drain On
Capacitance
e
t
TRANS
t
OPEN
t
ON(EN)
t
OFF(EN)
Q
OIRR
X
TALK
C
S(off)
C
D(off)
C
D(on)
V
S1
= 3.5 V, V
S8
= 0 V, (DG408L)
V
S1b
= 3.5 V, V
S4b
= 0 V, (DG409L)
see figure 2
V
S(all)
= V
DA
= 3.5 V,
see figure 4
V
AX
= 0 V, V
S1
= 3.5 V (DG408L)
V
AX
= 0 V, V
S1b
= 3.5 V (DG409L)
see figure 3
C
L
= 1 nF, R
GEN
= 0
,
V
GEN
= 0 V
f = 100 kHz, R
L
= 1 k
f = 1 MHz, V
S
= 0 V, V
EN
= 0 V
f = 1 MHz, V
D
= 0 V, V
EN
= 0 V
f = 1 MHz, V
D
= 0 V, V
EN
= 2.4 V
Room
Full
Room
Full
Room
Full
Room
Full
Room
Room
Room
Room
Room
Room
44
-
17
-
43
-
26
-
-1
-70
-80
8
21
32
-
-
1
-
-
-
-
-
-
-
-
-
-
-
125
138
-
-
60
70
45
60
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
125
135
-
-
60
65
45
50
-
-
-
-
-
-
pF
pC
dB
ns
V
INH
V
INL
I
IN
V+ = 5 V
V
AX
= V
EN
= 2.4 V or 0.6 V
Full
Full
Full
-
-
-
2.4
-
-1.5
-
0.6
1.5
2.4
-
-1
-
0.6
1
V
μA
I
D(on)
V+ = 4.5 V, V
D
or V
S
= 1 V or 3.5 V,
I
S
= 5 mA
V+ = 4.5 V, V
D
= 1 V or 3.5 V,
I
S
= 5 mA
Full
Room
Full
Room
Room
Room
V+ = 5.5 V, V
S
= 1 V or 4 V,
V
D
= 4 V or 1 V
Full
Room
Full
V+ = 5.5 V, V
D
= V
S
= 1 V or 4 V,
sequence each switch on
Room
Full
-
35
-
1.5
-
-
-
-
-
-
-
0
-
-
-
-
-1
-15
-1
-15
-1
-15
5
49
62
3
4
1
15
1
15
1
15
0
-
-
-
-
-1
-10
-1
-10
-1
-10
5
40
62
3
4
1
10
1
10
1
10
nA
V
Notes
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
g.
R
DS(on)
= R
DS(on)
max. - R
DS(on)
min.
h. Worst case isolation occurs on channel 4 do to proximity to the drain pin.
i. R
DS(on)
flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
S16-0276-Rev. J, 22-Feb-16
Document Number: 71342
5
For technical questions, contact:
analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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