PI6C3Q991A-5IJ datasheet, PDF - EEWORLD Datasheet

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PI6C3Q991A-5IJ: DescriptionPLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC, LCC-32; Categorylogic logic; File Size278KB，10 Pages; ManufacturerPericom Semiconductor Corporation (Diodes Incorporated); Websitehttps://www.diodes.com/

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PI6C3Q991A-5IJ Overview

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC, LCC-32

PI6C3Q991A-5IJ Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	QFJ
package instruction	QCCJ, LDCC32,.5X.6
Contacts	32
Reach Compliance Code	unknow
ECCN code	EAR99
series	6C
Input adjustment	STANDARD
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Su	0.5 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.7 ns
Maximum seat height	3.55 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.43 mm
minfmax	110 MHz
Base Number Matches	1

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3F0

VCCQ

REF

GND

TEST

2F1

VCCN

2Q1

2Q0

3Q1

3Q0

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PI6C3Q991A, PI6C3Q993A

3.3V Programmable Skew PLL Clock Driver

SuperClock



Description

Features

• PI6C3Q99X family provides following products:

PI6C3Q991A: 32-pin PLCC version

PI6C3Q993A: 28-pin QSOP version

• Inputs are 5V Tolerant

• 4 pairs of programmable skew outputs

• Low skew: 200ps same pair; 250ps all outputs

• Selectable positive or negative edge synchronization:

Excellent for DSP applications

• Synchronous output enable

• Input frequency: 3.75 MHz to 85 MHz

• Output frequency: 15 MHz to 85MHz

• 2x, 4x, 1/2, and 1/4 outputs

• 3 skew grades:

PI6C3Q99x: t

SKEW0

<750ps

PI6C3Q99x-5: t

SKEW0

<500ps

PI6C3Q99x-2: t

SKEW0

<250ps

• 3-level inputs for skew and PLL range control

• PLL bypass for DC testing

• External feedback, internal loop filter

• 12mA balanced drive outputs

• Low Jitter: < 200ps peak-to-peak

• Industrial temperature range

• Pin-to-pin compatible with IDT QS5V991A and QS5V993A

• Available in 32-pin PLCC and 28-pin QSOP

The PI6C3Q99X family, a high-fanout 3.3V PLL-based clock driver,

is intended for high-performance computing and data-communica-

tion applications. A key feature of the programmable skew is the

ability of outputs to lead or lag the REF input signal. The PI6C3Q991A

has 8 programmable skew outputs in 4 banks of 2, while the

PI6C3Q993A has 6 programmable skew outputs and 2 zero skew

outputs. Skew is controlled by 3-level input signals that may be

hard-wired to appropriate HIGH-MID-LOW levels.

When the GND/sOE pin is held LOW, all the outputs are synchro-

nously enabled. However, if GND/sOE is held HIGH, all outputs

except 3Q0 and 3Q1 are synchronously disabled. Furthermore,

when the V

CCQ

/PE is held HIGH, all outputs are synchronized with

the positive edge of the REF clock input. When V

CCQ

/PE is held

LOW, all outputs are synchronized with the negative edge of REF.

Both devices have LVTTL outputs with 12mA balanced drive

outputs.

Pin Configurations

PI6C3Q991A

REF

VCCQ

PI6C3Q993A

GND

TEST

2F1

2F0

GND/sOE

1F1

1F0

VCCN

1Q0

1Q1

GND

2Q0

2Q1

3F1

4F0

4F1

VCCQ/PE

VCCN

4Q1

4Q0

GND

1 32 31 30

32-Pin

15 16 17 18 19 20

3 2

2F0

GND/sOE

1F1

1F0

VCCN

1Q0

1Q1

GND

3F0

3F1

VCCQ/PE

VCCN

4Q1

4Q0

GND

3Q1

3Q0

VCCN

28-Pin

PS8628

08/15/02

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