PCK9447
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
Rev. 01 — 13 October 2005
Product data sheet
1. General description
The PCK9447 is a 3.3 V or 2.5 V compatible, 1 : 9 clock fan-out buffer targeted for high
performance clock tree applications. With output frequencies up to 350 MHz, and output
skews less than 150 ps, the device meets the needs of most demanding clock
applications.
The PCK9447 is specifically designed to distribute LVCMOS compatible clock signals up
to a frequency of 350 MHz. Each output provides a precise copy of the input signal with
near zero skew. The output buffers support driving of 50
Ω
terminated transmission lines
on the incident edge: each is capable of driving either one parallel terminated or two
series terminated transmission lines.
Two selectable independent LVCMOS compatible clock inputs are available, providing
support of redundant clock source systems. The PCK9447 CLK_STOP control is
synchronous to the falling edge of the input clock. It allows the start and stop of the output
clock signal only in a logic LOW state, thus eliminating potential output runt pulses.
Applying the OE control will force the outputs into high-impedance mode.
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs
from floating. The device supports a 2.5 V or 3.3 V power supply and an ambient
temperature range of
−40 °C
to +85
°C.
The PCK9447 is pin and function compatible but
performance-enhanced to the PCK947.
2. Features
s
s
s
s
s
s
s
s
s
s
s
9 LVCMOS compatible clock outputs
2 selectable, LVCMOS compatible inputs
Maximum clock frequency of 350 MHz
Maximum clock skew of 150 ps
Synchronous output stop in logic LOW state eliminates output runt pulses
High-impedance output control
3.3 V or 2.5 V power supply
Drives up to 18 series terminated clock lines
T
amb
=
−40 °C
to +85
°C
Available in LQFP32 package
Supports clock distribution in networking, telecommunications and computer
applications
s
Pin and function compatible to PCK947
Philips Semiconductors
PCK9447
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
3. Ordering information
Table 1:
Ordering information
Package
Name
PCK9447BD
LQFP32
Description
plastic low profile quad flat package; 32 leads;
body 7
×
7
×
1.4 mm
Version
SOT358-1
Type number
4. Functional diagram
PCK9447
V
CC
25 kΩ
60 kΩ
CCLK0
Q0
0
CLK
STOP
Q1
Q2
CCLK1
V
CC
25 kΩ
1
Q3
Q4
Q5
SYNC
Q6
Q7
CLK_SEL
V
CC
25 kΩ
CLK_STOP
V
CC
25 kΩ
Q8
OE
002aaa716
Fig 1. Functional diagram of PCK9447
9397 750 12522
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 13 October 2005
2 of 17
Philips Semiconductors
PCK9447
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
5. Pinning information
5.1 Pinning
29 GND
25 GND
24 GND
23 Q3
22 V
CC
21 Q4
20 GND
19 Q5
18 V
CC
17 GND
V
CC
10
Q8 11
GND 12
Q7 13
V
CC
14
Q6 15
GND 16
9
002aaa715
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
32 GND
31 V
CC
30 Q0
27 V
CC
28 Q1
GND
CLK_SEL
CCLK0
CCLK1
CLK_STOP
OE
V
CC
GND
1
2
3
4
5
6
7
8
PCK9447BD
Fig 2. Pin configuration for LQFP32
5.2 Pin description
Table 2:
Symbol
CCLK0
CCLK1
CLK_SEL
CLK_STOP
OE
Q0 to Q8
Pin description
Pin
3
4
2
5
6
30, 28, 26,
23, 21, 19,
15, 13, 11
1, 8, 9, 12,
16, 17, 20,
24, 25, 29,
32
7, 10, 14,
18, 22, 27,
31
Type
I
I
I
I
I
O
Description
clock signal input
alternative clock signal input
clock input select
clock output enable/disable
output enable/disable (high-impedance, 3-state)
clock outputs
GND
ground
negative power supply (GND)
V
CC
power
Positive power supply for I/O and core. All V
CC
pins must
be connected to the positive power supply for correct
operation.
9397 750 12522
Product data sheet
Rev. 01 — 13 October 2005
GND
26 Q2
3 of 17
Philips Semiconductors
PCK9447
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
6. Functional description
6.1 Function table
Table 3:
Control
CLK_SEL
OE
CLK_STOP
[1]
Function table
Default
1
1
1
Logic 0
CCLK0 input selected
outputs disabled
(high-impedance state)
[1]
Logic 1
CCLK1 input selected
outputs enabled
outputs synchronously stopped outputs active
in logic LOW state
OE = 0 will high-impedance 3-state all outputs independent of CLK_STOP.
7. Limiting values
Table 4:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
V
O
I
I
I
O
T
stg
Parameter
supply voltage
input voltage
output voltage
input current
output current
storage temperature
Conditions
Min
−0.3
−0.3
−0.3
-
-
−65
Max
+3.9
V
CC
+ 0.3
V
CC
+ 0.3
±20
±50
+125
Unit
V
V
V
mA
mA
°C
8. Characteristics
8.1 General characteristics
Table 5:
Symbol
V
TT
V
esd
General characteristics
Parameter
termination voltage
(output)
electrostatic discharge
voltage
latch-up protection
current
power dissipation
capacitance
input capacitance
per output
inputs
Machine Model
Human Body
Model
[1]
[2]
Conditions
Min
-
200
2000
200
-
-
Typ
V
CC
/2
-
-
-
10
4.0
Max
-
-
-
-
-
-
Unit
V
V
V
mA
pF
pF
I
latch(prot)
C
PD
C
i
[1]
[2]
200 pF capacitor discharged via a 10
Ω
resistor and a 0.75
µH
inductor
100 pF capacitor discharged via a 1.5 kΩ resistor
9397 750 12522
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 13 October 2005
4 of 17
Philips Semiconductors
PCK9447
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
8.2 Static characteristics
Table 6:
Static characteristics (3.3 V)
T
amb
=
−
40
°
C to +85
°
C; V
CC
= 3.3 V
±
5 %
Symbol
V
IH
V
IL
V
OH
V
OL
Z
o
I
I
I
q(max)
[1]
Parameter
HIGH-state input voltage
LOW-state input voltage
HIGH-state output voltage
LOW-state output voltage
output impedance
input current
maximum quiescent current
Conditions
LVCMOS
LVCMOS
I
OH
=
−24
mA
I
OL
= 24 mA
I
OL
= 12 mA
V
I
= V
CC
or GND
all V
CC
pins
[2]
[3]
[1]
Min
2.0
–0.3
2.4
-
-
-
-
-
Typ
-
-
-
-
-
17
-
-
Max
+0.8
-
0.55
0.30
-
±300
2.0
Unit
V
V
V
V
Ω
µA
mA
V
CC
+ 0.3 V
The PCK9447is capable of driving 50
Ω
transmission lines on the incident edge. Each output drives one 50
Ω
parallel terminated
transmission line to a termination voltage of V
TT
. Alternatively, the device drives up to two 50
Ω
series terminated transmission lines
(V
CC
= 3.3 V).
Inputs have pull-down or pull-up resistors affecting the input current.
I
q(max)
is the DC current consumption of the device with all outputs open and the input in its default state or open.
[2]
[3]
Table 7:
Static characteristics (2.5 V)
T
amb
=
−
40
°
C to +85
°
C; V
CC
= 2.5 V
±
5 %
Symbol
V
IH
V
IL
V
OH
V
OL
Z
o
I
I
I
q(max)
[1]
Parameter
HIGH-state input voltage
LOW-state input voltage
HIGH-state output voltage
LOW-state output voltage
output impedance
input current
maximum quiescent current
Conditions
LVCMOS
LVCMOS
I
OH
=
−15
mA
I
OL
= 15 mA
V
I
= V
CC
or GND
all V
CC
pins
[2]
[3]
[1]
Min
1.7
−0.3
1.8
-
-
-
-
Typ
-
-
-
-
19
-
-
Max
+0.7
-
0.6
-
±300
2.0
Unit
V
V
V
Ω
µA
mA
V
CC
+ 0.3 V
The PCK9447 is capable of driving 50
Ω
transmission lines on the incident edge. Each output drives one 50
Ω
parallel terminated
transmission line to a termination voltage of V
TT
. Alternatively, the device drives one 50
Ω
series terminated transmission line per output
(V
CC
= 2.5 V).
Inputs have pull-down or pull-up resistors affecting the input current.
I
q(max)
is the DC current consumption of the device with all outputs open and the input in its default state or open.
[2]
[3]
9397 750 12522
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 13 October 2005
5 of 17
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