The FDS6984S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6984S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Features
•
Q2:
Optimized to minimize conduction losses
Includes SyncFET Schottky diode
R
DS(on)
= 19 mΩ
=
@ V
GS
= 10V
R
DS(on)
= 28 mΩ
=
@ V
GS
= 4.5V
•
Q1:
Optimized for low switching losses
Low gate charge ( 5 nC typical)
R
DS(on)
= 0.040Ω
=
@ V
GS
= 10V
R
DS(on)
= 0.055Ω
=
@ V
GS
= 4.5V
8.5A, 30V
5.5A, 30V
D1
D1
D2
D2
S1
G1
5
6
7
Q1
4
3
2
Q2
SO-8
S2
8
1
G2
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
T
A
= 25°C unless otherwise noted
Parameter
Q2
30
(Note 1a)
Q1
30
±20
5.5
20
2
1.6
1
0.9
-55 to +150
Units
V
V
A
W
- Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
Drain Current
±20
8.5
30
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6984S
Device
FDS6984S
Reel Size
13”
Tape width
12mm
Quantity
2500 units
2000
Fairchild Semiconductor Corporation
FDS6984S Rev C(W)
FDS6984S
Electrical Characteristics
Symbol
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
∆V
GS(th)
===∆T
J
R
DS(on)
T
A
= 25°C unless otherwise noted
Parameter
Drain-Source Breakdown
Voltage
Test Conditions
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 24 V, V
GS
= 0 V
Type Min
Q2
Q1
Q2
Q1
All
All
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
30
20
1
1
30
30
Typ
Max Units
V
500
1
100
-100
3
3
µA
nA
nA
V
mV/°C
19
32
28
40
60
55
Off Characteristics
Zero Gate Voltage Drain
Current
Gate-Body Leakage, Forward V
GS
= 20 V, V
DS
= 0 V
Gate-Body Leakage, Reverse V
GS
= -20 V, V
DS
= 0 V
(Note 2)
On Characteristics
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
V
DS
= V
GS
, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 µA
I
D
= 1 mA, Referenced to 25°C
I
D
= 250 uA, Referenced to 25°C
V
GS
= 10 V, I
D
= 8.5 A
V
GS
= 10 V, I
D
= 8.5 A, T
J
= 125°C
V
GS
= 4.5 V, I
D
= 7 A
V
GS
= 10 V, I
D
= 5.5 A
V
GS
= 10 V, I
D
= 5.5 A, T
J
= 125°C
V
GS
= 4.5 V, I
D
= 4.6 A
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 5 V, I
D
= 8.5 A
V
DS
= 5 V, I
D
= 5.5 A
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
-6
-4
16
24
23
35
53
48
mΩ
I
D(on)
g
FS
On-State Drain Current
Forward Transconductance
A
26
40
1233
462
344
113
106
40
8
10
5
14
25
21
11
7
11
8.5
5
2.4
4
3.1
16
18
10
25
40
34
20
14
16
12
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10V, R
GEN
= 6
Ω
ns
ns
ns
ns
nC
nC
nC
Q2
V
DS
= 15 V, I
D
= 8.5 A, V
GS
=5V
Q1
V
DS
= 15 V, I
D
= 5.5 A, V
GS
= 5 V
FDS6680S Rev C (W)
FDS6984S
Electrical Characteristics
Symbol
I
S
t
rr
Q
rr
V
SD
(continued)
T
A
= 25°C unless otherwise noted
Parameter
Test Conditions
Type Min
Q2
Q1
Q2
(Note 2)
(Note 2)
Typ
Max Units
3.0
1.3
A
ns
0.7
1.2
nC
V
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current
Reverse Recovery Time
Reverse Recovery Charge
Drain-Source Diode Forward
Voltage
I
F
= 10A,
d
iF
/d
t
= 300 A/µs
V
GS
= 0 V, I
S
= 3.5 A
V
GS
= 0 V, I
S
= 1.3 A
17
12.5
0.5
0.74
(Note 3)
Q2
Q1
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a)
78°C/W when
mounted on a
0.5in
2
pad of 2
oz copper
b)
125°C/W when
mounted on a
0.02 in
2
pad of
2 oz copper
c)
135°C/W when
mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
See “SyncFET Schottky body diode characteristics” below.
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