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74F109_00

Description
Positive J-K positive edge-triggered flip-flops
File Size79KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74F109_00 Overview

Positive J-K positive edge-triggered flip-flops

74F109 Dual JK Positive Edge-Triggered Flip-Flop
April 1988
Revised September 2000
74F109
Dual JK Positive Edge-Triggered Flip-Flop
General Description
The F109 consists of two high-speed, completely indepen-
dent transition clocked JK flip-flops. The clocking operation
is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D-type flip-flop (refer
to F74 data sheet) by connecting the J and K inputs.
Asynchronous Inputs:
LOW input to S
D
sets Q to HIGH level
LOW input to C
D
sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes
both Q and Q HIGH
Ordering Code:
Order Number
74F109SC
74F109SJ
74F109PC
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009471
www.fairchildsemi.com

74F109_00 Related Products

74F109_00 74F109SC 74F109 74F109SJ 74F109PC
Description Positive J-K positive edge-triggered flip-flops Positive J-K positive edge-triggered flip-flops Positive J-K positive edge-triggered flip-flops Positive J-K positive edge-triggered flip-flops Positive J-K positive edge-triggered flip-flops
Is it Rohs certified? - conform to - conform to conform to
Parts packaging code - SOIC - SOIC DIP
package instruction - SOP, SOP16,.25 - 5.30 MM, EIAJ TYPE2, SOP-16 DIP, DIP16,.3
Contacts - 16 - 16 16
Reach Compliance Code - unknown - compli unknown
series - F/FAST - F/FAST F/FAST
JESD-30 code - R-PDSO-G16 - R-PDSO-G16 R-PDIP-T16
JESD-609 code - e3 - e3 e3
length - 9.9 mm - 10.2 mm 19.305 mm
Logic integrated circuit type - J-KBAR FLIP-FLOP - J-KBAR FLIP-FLOP J-KBAR FLIP-FLOP
MaximumI(ol) - 0.02 A - 0.02 A 0.02 A
Number of digits - 2 - 2 2
Number of functions - 2 - 2 2
Number of terminals - 16 - 16 16
Maximum operating temperature - 70 °C - 70 °C 70 °C
Output polarity - COMPLEMENTARY - COMPLEMENTARY COMPLEMENTARY
Package body material - PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - SOP - SOP DIP
Encapsulate equivalent code - SOP16,.25 - SOP16,.3 DIP16,.3
Package shape - RECTANGULAR - RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE - SMALL OUTLINE IN-LINE
Peak Reflow Temperature (Celsius) - 260 - 260 NOT APPLICABLE
power supply - 5 V - 5 V 5 V
Maximum supply current (ICC) - 17 mA - 17 mA 17 mA
propagation delay (tpd) - 9.2 ns - 9.2 ns 9.2 ns
Certification status - Not Qualified - Not Qualified Not Qualified
Maximum seat height - 1.75 mm - 2.1 mm 5.08 mm
Maximum supply voltage (Vsup) - 5.5 V - 5.5 V 5.5 V
Minimum supply voltage (Vsup) - 4.5 V - 4.5 V 4.5 V
Nominal supply voltage (Vsup) - 5 V - 5 V 5 V
surface mount - YES - YES NO
technology - TTL - TTL TTL
Temperature level - COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal surface - Matte Tin (Sn) - Matte Tin (Sn) Matte Tin (Sn)
Terminal form - GULL WING - GULL WING THROUGH-HOLE
Terminal pitch - 1.27 mm - 1.27 mm 2.54 mm
Terminal location - DUAL - DUAL DUAL
Maximum time at peak reflow temperature - NOT SPECIFIED - NOT SPECIFIED NOT APPLICABLE
Trigger type - POSITIVE EDGE - POSITIVE EDGE POSITIVE EDGE
width - 3.9 mm - 5.3 mm 7.62 mm
minfmax - 90 MHz - 90 MHz 90 MHz
Base Number Matches - 1 - 1 1
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