MC100LVEP210 datasheet, PDF - EEWORLD Datasheet

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MC100LVEP210: Description100LVE SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32; Categorysemiconductor logic; File Size103KB，9 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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MC100LVEP210 Overview

100LVE SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32

MC100LVEP210 Parametric

Parameter Name	Attribute value
Number of functions	2
Number of terminals	32
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.8 V
Minimum supply/operating voltage	2.38 V
Rated supply voltage	2.5 V
Processing package description	Lead FREE, Plastic, LQFP-32
Lead-free	Yes
EU RoHS regulations	Yes
China RoHS regulations	Yes
state	ACTIVE
Craftsmanship	emitter coupled logic circuit
packaging shape	SQUARE
Package Size	FLATPACK, low PROFILE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.8000 mm
terminal coating	MATTE Tin
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
series	100LVE
Enter conditions	differential
Logic IC type	Low Skew Clock Driver
Number of inverted outputs	0.0
Real output number	5
propagation delay TPD	0.4300 ns
Maximum same-side bending	0.0250 ns

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MC100LVEP210

2.5V / 3.3V 1:5 Dual

Differential ECL/PECL/HSTL

Clock Driver

Description

The MC100LVEP210 is a low skew 1−to−5 dual differential driver,

designed with clock distribution in mind. The ECL/PECL input

signals can be either differential or single−ended if the V

output is

used. The signal is fanned out to 5 identical differential outputs. HSTL

inputs can be used when the EP210 is operating in PECL mode.

The LVEP210 specifically guarantees low output−to−output skew.

Optimal design, layout, and processing minimize skew within a device

and from device to device.

To ensure the tight skew specification is realized, both sides of the

differential output need to be terminated identically into 50

even if

only one output is being used. If an output pair is unused, both outputs

may be left open (unterminated) without affecting skew.

The MC100LVEP210, as with most other ECL devices, can be

operated from a positive V

supply in PECL mode. This allows the

LVEP210 to be used for high performance clock distribution in +3.3 V

or +2.5 V systems. Single−ended CLK input operation is limited to a

≥

3.0 V in PECL mode, or V

≤

−3.0 V in ECL mode.

Designers can take advantage of the LVEP210’s performance to

distribute low skew clocks across the backplane or the board. In a

PECL environment, series or Thevenin line terminations are typically

used as they require no additional power supplies. For more

information on using PECL, designers should refer to Application

Note AN1406/D.

Features

http://onsemi.com

MARKING

DIAGRAMS*

32−LEAD LQFP

FA SUFFIX

CASE 873A

MC100

LVEP21

AWLYYWWG

QFN32

MN SUFFIX

CASE 488AM

G or

MC100

LVEP210

AWLYYWWG

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

•

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

85 ps Typical Device−to−Device Skew

20 ps Typical Output−to−Output Skew

Output

Jitter Less than 1 ps RMS

350 ps Typical Propagation Delay

Maximum Frequency

3 GHz Typical

The 100 Series Contains Temperature Compensation

PECL and HSTL Mode Operating Range: V

= 2.375 V to 3.8 V

with V

= 0 V

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

•

NECL Mode Operating Range: V

= 0 V

with V

= −2.375 V to −3.8 V

•

Open Input Default State

•

LVDS Input Compatible

•

Fully Compatible with MC100EP210

•

These are Pb−Free Devices

Semiconductor Components Industries, LLC, 2014

May, 2014 − Rev. 15

Publication Order Number:

MC100LVEP210/D

MC100LVEP210 Related Products

	MC100LVEP210	MC100LVEP210_06
Description	100LVE SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32	100LVE SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
Number of functions	2	2
Number of terminals	32	32
Maximum operating temperature	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel
Maximum supply/operating voltage	3.8 V	3.8 V
Minimum supply/operating voltage	2.38 V	2.38 V
Rated supply voltage	2.5 V	2.5 V
Processing package description	Lead FREE, Plastic, LQFP-32	Lead FREE, Plastic, LQFP-32
Lead-free	Yes	Yes
EU RoHS regulations	Yes	Yes
China RoHS regulations	Yes	Yes
state	ACTIVE	ACTIVE
Craftsmanship	emitter coupled logic circuit	emitter coupled logic circuit
packaging shape	SQUARE	SQUARE
Package Size	FLATPACK, low PROFILE	FLATPACK, low PROFILE
surface mount	Yes	Yes
Terminal form	GULL WING	GULL WING
Terminal spacing	0.8000 mm	0.8000 mm
terminal coating	MATTE Tin	MATTE Tin
Terminal location	Four	Four
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy
Temperature level	INDUSTRIAL	INDUSTRIAL
series	100LVE	100LVE
Enter conditions	differential	differential
Logic IC type	Low Skew Clock Driver	Low Skew Clock Driver
Number of inverted outputs	0.0	0.0
Real output number	5	5
propagation delay TPD	0.4300 ns	0.4300 ns
Maximum same-side bending	0.0250 ns	0.0250 ns

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