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MC10114P

Description
Triple Line Receiver
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size112KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

MC10114P Overview

Triple Line Receiver

MC10114P Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeDIP
package instructionPLASTIC, DIP-16
Contacts16
Reach Compliance Code_compli
ECCN codeEAR99
Differential outputYES
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsGENERAL PURPOSE
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length19.175 mm
Nominal negative supply voltage-5.2 V
Number of functions3
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-30 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply-5.2 V
Certification statusNot Qualified
Maximum receive delay4 ns
Number of receiver bits3
Maximum seat height4.44 mm
Maximum slew rate39 mA
surface mountNO
technologyECL
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
MC10114
Triple Line Receiver
The MC10114 is a triple line receiver designed for use in sensing
differential signals over long lines. An active current source and
translated emitter follower inputs provide the line receiver with a
common mode noise rejection limit of one volt in either the positive or
the negative direction. This allows a large amount of common mode
noise immunity for extra long lines.
Another feature of the MC10114 is that the OR outputs go to a logic
low level whenever the inputs are left floating. The outputs are each
capable of driving 50 ohm transmission lines.
This device is useful in high speed central processors,
minicomputers, peripheral controllers, digital communication
systems, testing and instrumen– tation systems. The MC10114 can
also be used for MOS to MECL interfacing and it is ideal as a sense
amplifier for MOS RAM’s.
A V
BB
reference is provided which is useful in making the
MC10114 a Schmit trigger, allowing single–ended driving of the
inputs, or other applications where a stable reference voltage is
necessary. See MECL Design Handbook (HB205) pages 226 and 228.
P
D
= 145 mW typ/pkg
t
pd
= 2.4 ns typ (Single Ended Input)
t
pd
= 2.0 ns typ (Differential Input)
t
r
, t
f
= 2.1 ns typ (20%–80%)
LOGIC DIAGRAM
4
5
9
10
12
13
V
BB
*
2
3
6
7
14
15
11
V
CC1
= PIN 1
V
CC2
= PIN 16
V
EE
= PIN 8
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
1
16
PDIP–16
P SUFFIX
CASE 648
1
1
PLCC–20
FN SUFFIX
CASE 775
10114
AWLYYWW
MC10114P
AWLYYWW
MC10114L
AWLYYWW
ORDERING INFORMATION
Device
MC10114L
MC10114P
MC10114FN
Package
CDIP–16
PDIP–16
PLCC–20
Shipping
25 Units / Rail
25 Units / Rail
46 Units / Rail
*V
BB
to be used to supply bias to the MC10114 only and bypassed (when used) with
0.01
µ
F to 0.1
µ
F capacitor to ground (0 V). V
BB
can source < 1.0 mA.
When the input pin with the bubble goes positive, its respective output pin with
bubble goes positive.
DIP PIN ASSIGNMENT
V
CC1
A
OUT
A
OUT
A
IN
A
IN
B
OUT
B
OUT
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
C
OUT
C
OUT
C
IN
C
IN
V
BB
B
IN
B
IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
©
Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10114/D

MC10114P Related Products

MC10114P MC10114 MC10114L MC10114_02 MC10114FN
Description Triple Line Receiver Triple Line Receiver Triple Line Receiver Triple Line Receiver Triple Line Receiver
Parts packaging code DIP - DIP - QLCC
package instruction PLASTIC, DIP-16 - CERAMIC, DIP-16 - PLASTIC, LCC-20
Contacts 16 - 16 - 20
Reach Compliance Code _compli - _compli - _compli
ECCN code EAR99 - EAR99 - EAR99
Differential output YES - YES - YES
Input properties DIFFERENTIAL - DIFFERENTIAL - DIFFERENTIAL
Interface integrated circuit type LINE RECEIVER - LINE RECEIVER - LINE RECEIVER
Interface standards GENERAL PURPOSE - GENERAL PURPOSE - GENERAL PURPOSE
JESD-30 code R-PDIP-T16 - R-CDIP-T16 - S-PQCC-J20
JESD-609 code e0 - e0 - e0
length 19.175 mm - 19.49 mm - 8.965 mm
Nominal negative supply voltage -5.2 V - -5.2 V - -5.2 V
Number of functions 3 - 3 - 3
Number of terminals 16 - 16 - 20
Maximum operating temperature 85 °C - 85 °C - 85 °C
Minimum operating temperature -30 °C - -30 °C - -30 °C
Package body material PLASTIC/EPOXY - CERAMIC, METAL-SEALED COFIRED - PLASTIC/EPOXY
encapsulated code DIP - DIP - QCCJ
Encapsulate equivalent code DIP16,.3 - DIP16,.3 - LDCC20,.4SQ
Package shape RECTANGULAR - RECTANGULAR - SQUARE
Package form IN-LINE - IN-LINE - CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED
power supply -5.2 V - -5.2 V - -5.2 V
Certification status Not Qualified - Not Qualified - Not Qualified
Maximum receive delay 4 ns - 4 ns - 4 ns
Number of receiver bits 3 - 3 - 3
Maximum seat height 4.44 mm - 5.08 mm - 4.57 mm
Maximum slew rate 39 mA - 39 mA - 39 mA
surface mount NO - NO - YES
technology ECL - ECL - ECL
Temperature level OTHER - OTHER - OTHER
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) - Tin/Lead (Sn80Pb20)
Terminal form THROUGH-HOLE - THROUGH-HOLE - J BEND
Terminal pitch 2.54 mm - 2.54 mm - 1.27 mm
Terminal location DUAL - DUAL - QUAD
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED
width 7.62 mm - 7.62 mm - 8.965 mm

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