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MC10124_02

Description
QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20
Categorysemiconductor    Analog mixed-signal IC   
File Size121KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

MC10124_02 Overview

QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20

MC10124_02 Parametric

Parameter NameAttribute value
Number of functions4
Number of terminals20
Minimum operating temperature-30 Cel
Maximum operating temperature85 Cel
Processing package descriptionPLASTIC, LCC-20
stateActive
Interface TypeTTL TO ECL TRANSLATOR
delay_max6 ns
jesd_30_codeS-PQCC-J20
jesd_609_codee0
moisture_sensitivity_levelNOT SPECIFIED
egative_supply_voltage_nom-5.2 V
Number of digits1
Output characteristicsOPEN-EMITTER
Output latch or registerNONE
Output polarityCOMPLEMENTARY
Packaging MaterialsPLASTIC/EPOXY
ckage_codeQCCJ
packaging shapeSQUARE
Package SizeCHIP CARRIER
eak_reflow_temperature__cel_NOT SPECIFIED
qualification_statusCOMMERCIAL
seated_height_max4.57 mm
Rated supply voltage5 V
surface mountYES
Temperature levelOTHER
terminal coatingTIN LEAD
Terminal formJ BEND
Terminal spacing1.27 mm
Terminal locationQUAD
ime_peak_reflow_temperature_max__s_NOT SPECIFIED
length8.96 mm
width8.96 mm
MC10124
Quad TTL to MECL
Translator
The MC10124 is a quad translator for interfacing data and control
signals between a saturated logic section and the MECL section of
digital systems. The MC10124 has TTL compatible inputs, and
MECL complementary open–emitter outputs that allow use as an
inverting/ non–inverting translator or as a differential line driver.
When the common strobe input is at the low logic level, it forces all
true outputs to a MECL low logic state and all inverting outputs to a
MECL high logic state.
Power supply requirements are ground, +5.0 Volts, and –5.2 Volts.
Propagation delay of the MC10124 is typically 3.5 ns. The dc levels
are standard or Schottky TTL in, MECL 10,000 out.
An advantage of this device is that TTL level information can be
transmitted differentially, via balanced twisted pair lines, to the MECL
equipment, where the signal can be received by the MC10115 or
MC10116 differential line receivers. The MC10124 is useful in
computers, instrumentation, peripheral controllers, test equipment,
and digital communications systems.
P
D
= 380 mW typ/pkg (No Load)
t
pd
= 3.5 ns typ (+ 1.5 Vdc in to 50% out)
t
r
, t
f
= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
5
6
7
10
11
Gnd
=
V
CC
(+5.0Vdc) =
V
EE
(-5.2Vdc) =
4
2
3
1
12
15
13
14
PIN 16
PIN 9
PIN 8
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
1
16
PDIP–16
P SUFFIX
CASE 648
1
1
PLCC–20
FN SUFFIX
CASE 775
10124
AWLYYWW
MC10124P
AWLYYWW
MC10124L
AWLYYWW
ORDERING INFORMATION
Device
MC10124L
MC10124P
Package
CDIP–16
PDIP–16
PLCC–20
Shipping
25 Units / Rail
25 Units / Rail
46 Units / Rail
DIP PIN ASSIGNMENT
B
OUT
A
OUT
B
OUT
A
OUT
A
IN
COMMON
STROBE
B
IN
MC10124FN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
C
OUT
D
OUT
D
OUT
C
OUT
D
IN
C
IN
V
CC
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
©
Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10124/D

MC10124_02 Related Products

MC10124_02 MC10124 MC10124L MC10124P MC10124FN
Description QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20 QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20 QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20 QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20 QUAD TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC20
Number of functions 4 4 4 4 4
Number of terminals 20 20 16 16 20
Minimum operating temperature -30 Cel -30 Cel -30 °C -30 °C -30 °C
Maximum operating temperature 85 Cel 85 Cel 85 °C 85 °C 85 °C
Number of digits 1 1 1 1 1
Output characteristics OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER
Output latch or register NONE NONE NONE NONE NONE
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
surface mount YES YES NO NO YES
Temperature level OTHER OTHER OTHER OTHER OTHER
Terminal form J BEND J BEND THROUGH-HOLE THROUGH-HOLE J BEND
Terminal location QUAD QUAD DUAL DUAL QUAD
length 8.96 mm 8.96 mm 19.495 mm 19.175 mm 8.965 mm
width 8.96 mm 8.96 mm 7.62 mm 7.62 mm 8.965 mm
Is it lead-free? - - Contains lead Contains lead Contains lead
Is it Rohs certified? - - incompatible incompatible incompatible
Maker - - ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code - - DIP DIP QLCC
package instruction - - CERAMIC, DIP-16 PLASTIC, DIP-16 PLASTIC, LCC-20
Contacts - - 16 16 20
Reach Compliance Code - - _compli _compli _compli
ECCN code - - EAR99 EAR99 EAR99
maximum delay - - 6 ns 6 ns 6 ns
Interface integrated circuit type - - TTL TO ECL TRANSLATOR TTL TO ECL TRANSLATOR TTL TO ECL TRANSLATOR
JESD-30 code - - R-GDIP-T16 R-PDIP-T16 S-PQCC-J20
JESD-609 code - - e0 e0 e0
Nominal negative supply voltage - - -5.2 V -5.2 V -5.2 V
Package body material - - CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - DIP DIP QCCJ
Encapsulate equivalent code - - DIP16,.3 DIP16,.3 LDCC20,.4SQ
Package shape - - RECTANGULAR RECTANGULAR SQUARE
Package form - - IN-LINE IN-LINE CHIP CARRIER
Peak Reflow Temperature (Celsius) - - 240 NOT SPECIFIED NOT SPECIFIED
power supply - - 5,-5.2 V 5,-5.2 V 5,-5.2 V
Certification status - - Not Qualified Not Qualified Not Qualified
Maximum seat height - - 5.08 mm 4.44 mm 4.57 mm
Nominal supply voltage - - 5 V 5 V 5 V
technology - - ECL10K ECL10K ECL10K
Terminal surface - - Tin/Lead (Sn/Pb) Tin/Lead (Sn80Pb20) Tin/Lead (Sn/Pb)
Terminal pitch - - 2.54 mm 2.54 mm 1.27 mm
Maximum time at peak reflow temperature - - 30 NOT SPECIFIED NOT SPECIFIED
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