Burr Brown Products
from Texas Instruments
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
FEATURES
•
•
•
•
•
Monolithic 20-Bit
∆Σ
ADC and DAC
16/20-Bit Input/Output Data
Software Control: PCM3002
Hardware Control: PCM3003
Stereo ADC:
– Single-Ended Voltage Input
– Antialiasing Filter
– 64× Oversampling
– High Performance
•
THD+N: –86 dB
•
SNR: 90 dB
•
Dynamic Range: 90 dB
Stereo DAC:
– Single-Ended Voltage Output
– Analog Low-Pass Filter
– 64× Oversampling
– High Performance
•
THD+N: –86 dB
•
SNR: 94 dB
•
Dynamic Range: 94 dB
Special Features (PCM3002, PCM3003)
– Digital De-Emphasis: 32 kHz, 44.1 kHz,
48 kHz
– Power Down: ADC/DAC Independent
Special Features (PCM3002)
– Digital Attenuation (256 Steps)
– Soft Mute
– Digital Loopback
– Four Alternative Audio Data Formats
Sampling Rate: 4 kHz to 48 kHz
•
•
•
•
•
Single 3-V Power Supply
Small Package: SSOP-24
APPLICATIONS
DVC Applications
DSC Applications
Portable/Mobile Audio Applications
DESCRIPTION
The PCM3002 and PCM3003 are low-cost,
single-chip stereo audio codecs (analog-to-digital and
digital-to-analog converters) with single-ended analog
voltage input and output.
The ADCs and DACs employ delta-sigma modulation
with 64-times oversampling. The ADCs include a
digital decimation filter, and the DACs include an
8-times oversampling digital interpolation filter. The
DACs also include digital attenuation, de-emphasis,
infinite zero detection, and soft mute to form a
complete subsystem. The PCM3002 and PCM3003
operate with left-justified (ADC) and right-justified
(DAC) formats, while the PCM3002 also supports
other formats, including the I
2
S data format.
The PCM3002 and PCM3003 provide a power-down
mode that operates on the ADCs and DACs indepen-
dently.
The PCM3002 and PCM3003 are fabricated using a
highly advanced CMOS process, and are available in
a 24-pin SSOP package. The PCM3002 and
PCM3003 are suitable for a wide variety of
cost-sensitive consumer applications where good per-
formance is required.
The PCM3002 programmable functions are controlled
by software. The PCM3003 functions, which are
controlled by hardware, include de-emphasis,
power-down, and audio data format selections.
•
•
•
•
Lch In
Analog Front-End
Rch In
Delta-Sigma
Modulator
Digital
Decimation
Filter
*
Digital Out
Serial Interface
and
Mode Control
Digital In
Lch Out
Rch Out
Low-Pass Filter
and
Output Buffer
* PCM3002 Only
Multilevel
Delta-Sigma
Modulator
Digital
Interpolation
Filter
Mode Control
System Clock
B0006-01
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2004, Texas Instruments Incorporated
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= 25°C, V
DD
= V
CC
= 3 V, f
S
= 44.1 kHz, SYSCLK = 384 f
S
, and 16-bit data, unless otherwise noted
PARAMETER
DIGITAL INPUT/OUTPUT
Input Logic
V
IH (1) (2) (3)
V
IL (1) (2) (3)
I
IN (2)
I
IN (1) (3)
V
OH (4)
V
OL (4)
V
OL
f
s
(5)
CONDITIONS
PCM3002E/3003E
MIN
TYP
MAX
UNITS
Input logic level
Input logic current
0.7 V
DD
0.3 V
DD
±1
100
I
OUT
= –1 mA
V
DD
– 0.3
0.3
0.3
4
(6)
256 f
S
1.024
1.536
2.048
384 f
S
512 f
S
44.1
11.2896
16.9344
22.5792
20
48
12.288
18.432
24.576
VDC
µA
Output Logic
Output logic level
I
OUT
= 1 mA
I
OUT
= 1 mA
Sampling frequency
System clock frequency
ADC CHARACTERISTICS
Resolution
DC Accuracy
Gain mismatch, channel-
to-channel
Gain error
Gain drift
Bipolar zero error
Bipolar zero drift
Dynamic Performance
(8)
THD+N
Dynamic range
Signal-to-noise ratio
Channel separation
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
2
V
IN
= –0.5 dB
V
IN
= –60 dB
A-weighted
A-weighted
86
86
84
–86
–28
90
90
88
–80
dB
dB
dB
dB
High-pass filter bypassed
(7)
High-pass filter bypassed
(7)
±1
±2
±20
±1.7
±20
±3
±5
% of FSR
% of FSR
ppm of FSR/°C
% of FSR
ppm of FSR/°C
Bits
VDC
CLOCK FREQUENCY
kHz
MHz
Pins 7, 8, 17 and 18: RST, ML, MD, and MC for the PCM3002; PDAD, PDDA, DEM1, and DEM0 for PCM3003 (Schmitt-trigger input
with 100-kΩ typical internal pulldown resistor)
Pins 9, 10, 11, 15: SYSCLK, LRCIN, BCKIN, DIN (Schmitt-trigger input)
Pin 16: 20BIT for PCM3003 (Schmitt-trigger input, 100-kΩ typical internal pulldown resistor)
Pin 12: DOUT
Pin 16: ZFLG for PCM3002 (open-drain output)
See Application Bulletin
SBAA033
for information relating to operation at lower sampling frequencies.
High-pass filter for offset cancel
f
IN
= 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in rms mode with 20-kHz LPF, 400-Hz HPF used
for performance calculation.
PCM3002
PCM3003
www.ti.com
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T
A
= 25°C, V
DD
= V
CC
= 3 V, f
S
= 44.1 kHz, SYSCLK = 384 f
S
, and 16-bit data, unless otherwise noted
PARAMETER
Digital Filter Performance
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
HPF frequency response
Analog Input
Voltage range
Center voltage
Input impedance
Antialiasing filter frequency
response
DAC CHARACTERISTICS
Resolution
DC Accuracy
Gain mismatch, channel-
to-channel
Gain error
Gain drift
Bipolar zero error
Bipolar zero drift
Dynamic Performance
(9)
THD+N
Dynamic range
Signal-to-noise ratio
Channel separation
Digital Filter Performance
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
Analog Output
Voltage range
Center voltage
Load impedance
LPF frequency response
(9)
AC coupling
f = 20 kHz
10
–0.16
0.6 V
CC
0.5 V
CC
Vp-p
VDC
kΩ
dB
–35
11.1/f
S
0.555 f
S
±0.17
0.445 f
S
Hz
Hz
dB
dB
s
V
OUT
= 0 dB (full scale)
V
OUT
= –60 dB
EIAJ, A-weighted
EIAJ, A-weighted
88
88
86
–86
–32
94
94
91
–80
dB
dB
dB
dB
±1
±1
±20
±2.5
±20
±3
±5
% of FSR
% of FSR
ppm of FSR/°C
% of FSR
ppm of FSR/°C
20
Bits
–3 dB
0.6 V
CC
0.5 V
CC
30
150
Vp-p
VDC
kΩ
kHz
–3 dB
–65
17.4/f
S
0.019 f
S
0.583 f
S
±0.05
0.454 f
S
Hz
Hz
dB
dB
s
mHz
CONDITIONS
PCM3002E/3003E
MIN
TYP
MAX
UNITS
f
OUT
= 1 kHz, using the System Two audio measurement system by Audio Precision in rms mode with 20-kHz LPF, 400-Hz HPF used
for performance calculation.
3
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T
A
= 25°C, V
DD
= V
CC
= 3 V, f
S
= 44.1 kHz, SYSCLK = 384 f
S
, and 16-bit data, unless otherwise noted
PARAMETER
POWER SUPPLY REQUIREMENTS
V
CC
, V
DD
Supply voltage
Supply current
–25°C to 85°C
0° C to 70°C
(10)
Operation, V
CC
= V
DD
= 3 V
Power down, V
CC
= V
DD
= 3 V
Operation, V
CC
= V
DD
= 3 V
Power dissipation
TEMPERATURE RANGE
T
A
T
stg
θ
JA
Operation
Storage
Thermal resistance
–25
–55
100
85
125
°C
°C
°C/W
Power
down
(11)
,
3V
V
CC
= V
DD
=
2.7
2.4
3
3
18
50
54
150
72
3.6
3.6
24
VDC
VDC
mA
µA
mW
µW
CONDITIONS
PCM3002E/3003E
MIN
TYP
MAX
UNITS
(10) Applies for voltages between 2.4 V and 2.7 V for 0°C to 70°C and 256 f
S
/512 f
S
operation (384 f
S
not available)
(11) SYSCLK, BCKIN, and LRCIN are stopped.
PACKAGE/ORDERING INFORMATION
PRODUCT
PCM3002E
PCM3003E
PACKAGE
TYPE
24-pin SSOP
24-pin SSOP
PACKAGE
CODE
DB
DB
PACKAGE
MARKING
PCM3002E
PCM3003E
ORDERING
NUMBER
PCM3002E
PCM3002E/2K
PCM3003E
PCM3003E/2K
TRANSPORT
MEDIA
Rails
Tape and reel
Rails
Tape and reel
QUANTITY
58
2000
58
2000
ABSOLUTE MAXIMUM RATINGS
Supply voltage V
DD
, V
CC
1, V
CC
2
Supply voltage differences
GND voltage differences
Digital input voltage
Analog input voltage
Power dissipation
Input current (any pins except supplies)
Operating temperature
Storage temperature
Lead temperature, soldering
Package temperature (IR reflow, peak)
–0.3 V to 6.5 V
±0.1
V
±0.1
V
–0.3 V to V
DD
+ 0.3 V, < 6.5 V
–0.3 V to V
CC
1, V
CC
2 + 0.3 V, < 6.5 V
300 mW
±10
mA
–25°C to 85°C
–55°C to 125°C
260°C, 5 s
235°C
4
PCM3002
PCM3003
www.ti.com
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range
MIN
Analog supply voltage, V
CC
1, V
CC
2
Digital supply voltage, V
DD
Analog input voltage, full scale (–0 dB)
Digital input logic family
Digital input clock frequency
Analog output load resistance
Analog output load capacitance
Digital output load capacitance
Operating free-air temperature, T
A
PCM3002
(TOP VIEW)
NOM
3
3
1.8
CMOS
MAX
3.6
3.6
UNIT
V
V
Vp-p
2.7
2.7
V
CC
= 3 V
System clock
Sampling clock
8.192
32
10
24.576
48
30
10
MHz
kHz
kΩ
pF
pF
–25
PCM3003
(TOP VIEW)
24
23
22
21
20
19
18
17
16
15
14
13
85
°C
V
CC
1
V
CC
1
V
IN
R
V
REF
1
V
REF
2
V
IN
L
RST
ML
SYSCLK
LRCIN
BCKIN
DOUT
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
MC
MD
ZFLG
DIN
V
DD
DGND
V
CC
1
V
CC
1
V
IN
R
V
REF
1
V
REF
2
V
IN
L
PDAD
PDDA
SYSCLK
LRCIN
BCKIN
DOUT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
DEM0
DEM1
20BIT
DIN
V
DD
DGND
P0004-02
PIN ASSIGNMENTS—PCM3002
NAME
AGND1
AGND2
BCKIN
DGND
DIN
DOUT
LRCIN
MC
MD
ML
RST
SYSCLK
V
CC
1
V
CC
2
V
COM
V
DD
(1)
(2)
PIN
23
22
11
13
15
12
10
18
17
8
7
9
1, 2
24
21
14
I/O
–
–
I
–
I
O
I
I
I
I
I
I
–
–
–
–
ADC analog ground
DAC analog ground
Bit clock input
(1)
Digital ground
Data input
(1)
Data output
Sample rate clock input (f
s
)
(1)
Bit clock for mode control
(1) (2)
Serial data for mode control
(1) (2)
Strobe pulse for mode control
(1) (2)
Reset, active LOW
(1) (2)
System clock input
(1)
ADC analog power supply
DAC analog power supply
ADC/DAC common
Digital power supply
DESCRIPTION
Schmitt-trigger input
With 100-kΩ typical internal pulldown resistor
5
京公网安备 11010802033920号
EEWORLD
