NLAST4051
Analog Multiplexer/
Demultiplexer
TTL Compatible, Single−Pole, 8−Position
Plus Common Off
The NLAST4051 is an improved version of the MC14051 and
MC74HC4051 fabricated in sub−micron Silicon Gate CMOS technology
for lower R
DS(on)
resistance and improved linearity with low current.
This device may be operated either with a single supply or dual supply up
to
±3
V to pass a 6 V
PP
signal without coupling capacitors.
When operating in single supply mode, it is only necessary to tie
V
EE
, pin 7 to ground. For dual supply operation, V
EE
is tied to a
negative voltage, not to exceed maximum ratings. Translation is
provided in the device, the Address and Inhibit are standard TTL level
compatible. For CMOS compatibility see NLAS4051. Pin for pin
compatible with all industry standard versions of ‘4051.’
Features
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MARKING
DIAGRAM
16
TSSOP−16
DT SUFFIX
CASE 948F
1
A
L
Y
W
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
AST
4051
ALYWG
G
•
Improved R
DS(on)
Specifications
•
Pin for Pin Replacement for MAX4051 and MAX4051A
•
− One Half the Resistance Operating at 5.0 V
Single or Dual Supply Operation
− Single 3.0 − 5.0 V Operation, or Dual
±3
V Operation
− With V
CC
of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
−
No Translators Needed
− Address and Inhibit Logic are Over−Voltage Tolerant and May Be
−
Driven Up +6 V Regardless of V
CC
Address and Inhibit Pins Standard TTL Compatible
− Greatly Improved Noise Margin Over MAX4051 and MAX4051A
− True TTL Compatibility V
IL
= 0.8 V, V
IH
= 2.0 V
Improved Linearity Over Standard HC4051 Devices
Space Saving TSSOP Package
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
CC
16
NO
2
15
NO
4
14
NO
0
13
NO
6
ADD
C
ADD
B
ADD
A
12
11
10
9
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
•
•
•
•
•
1
NO
1
2
3
4
NO
7
5
NO
5
6
7
8
GND
NO
3
COM
Inhibit V
EE
Figure 1. Pin Connection
(Top View)
©
Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 5
Publication Order Number:
NLAST4051/D
NLAST4051
TRUTH TABLE
Inhibit
C
1
0
0
0
0
0
0
0
0
X
don’t care
0
0
0
0
1
1
1
1
Address
B
X
don’t care
0
0
1
1
0
0
1
1
A
X
don’t care
0
1
0
1
0
1
0
1
All switches open
NO
2
COM−NO
0
COM−NO
1
COM−NO
2
COM−NO
3
COM−NO
4
COM−NO
5
COM−NO
6
COM−NO
7
ADD
C
ADD
B
ADD
A
LOGIC
NO
6
NO
7
Inhibit
COM
NO
3
NO
4
NO
5
ON SWITCHES*
NO
0
NO
1
*NO and COM pins are identical and interchangeable. Either may be considered
an input or output; signals pass equally well in either direction.
Figure 2. Logic Diagram
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MAXIMUM RATINGS
Symbol
V
EE
Parameter
Value
Unit
V
V
V
V
Negative DC Supply Voltage
(Referenced to GND)
−7.0 to
)0.5
−0.5 to
)7.0
−0.5 to
)7.0
V
CC
V
IS
Positive DC Supply Voltage (Note 1)
Analog Input Voltage
Digital Input Voltage
(Referenced to GND)
(Referenced to V
EE
)
V
EE
−0.5 to V
CC
)0.5
−0.5 to 7.0
$50
V
IN
I
(Referenced to GND)
DC Current, Into or Out of Any Pin
Storage Temperature Range
mA
°C
°C
°C
T
STG
T
L
T
J
−65 to
)150
260
)150
164
450
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
q
JA
P
D
°C/W
mW
Power Dissipation in Still Air
Moisture Sensitivity
MSL
F
R
Level 1
Flammability Rating
Oxygen Index: 30% − 35%
UL 94 V−0 @ 0.125 in
u2000
u200
u1000
$300
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
I
LATCHUP
Latchup Performance
Above V
CC
and Below GND at 125°C (Note 5)
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The absolute value of V
CC
$|V
EE
|
≤
7.0.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
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2
NLAST4051
RECOMMENDED OPERATING CONDITIONS
Symbol
V
EE
Negative DC Supply Voltage
Positive DC Supply Voltage
Analog Input Voltage
Digital Input Voltage
Parameter
(Referenced to GND)
(Referenced to GND)
(Referenced to V
EE
)
Min
−5.5
2.5
2.5
Max
GND
5.5
6.6
Unit
V
V
V
V
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
Î
V
CC
V
IS
V
EE
0
V
CC
5.5
V
IN
T
A
(Note 6) (Referenced to GND)
Operating Temperature Range, All Package Types
−55
0
0
125
100
20
°C
t
r
, t
f
Input Rise/Fall Time
(Channel Select or Enable Inputs)
V
CC
= 3.0 V
$
0.3 V
V
CC
= 5.0 V
$
0.5 V
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Unused digital inputs may not be left open. All digital inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
DC CHARACTERISTICS − Digital Section
(Voltages Referenced to GND)
V
CC
V
3.0
4.5
5.5
3.0
4.5
5.5
V
IN
= 6.0 or GND
Address or Inhibit and
V
IS
= V
CC
or GND
0 V to 6.0 V
6.0
Guaranteed Limit
−55
to 25°C
1.6
2.0
2.0
0.5
0.8
0.8
$0.1
4.0
v85°C
1.6
2.0
2.0
0.5
0.8
0.8
$1.0
40
v125°C
1.6
2.0
2.0
0.5
0.8
0.8
$1.0
80
Unit
V
Symbol
V
IH
Parameter
Minimum High−Level Input Voltage,
Address or Inhibit Inputs
Maximum Low−Level Input Voltage,
Address or Inhibit Inputs
Maximum Input Leakage Current,
Address or Inhibit Inputs
Maximum Quiescent Supply
Current (per Package)
Condition
V
IL
V
I
IN
I
CC
mA
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
DC ELECTRICAL CHARACTERISTICS − Analog Section
Symbol
R
ON
Parameter
Test Conditions
V
CC
V
3.0
4.5
3.0
3.0
4.5
3.0
V
EE
V
Guaranteed Limit
v85°C
108
46
33
20
18
15
4
2
−55 to 25°C
86
37
26
15
13
10
4
2
v125°C
120
55
37
20
18
15
5
3
Unit
W
Maximum “ON” Resistance
V
IN
= V
IL
or V
IH
V
IS
= (V
EE
to V
CC
)
|I
S
| = 10 mA
(Figures 4 thru 9)
V
IN
= V
IL
or V
IH,
|I
S
| = 10 mA,
0
0
−3.0
0
0
−3.0
DR
ON
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Pack-
age
V
IS
= 2.0 V
V
IS
= 3.0 V
V
IS
= 2.0 V
W
Rflat
(ON)
ON Resistance Flatness
Maximum Off−Channel
Leakage Current
V
COM
= 1, 2, 3.5 V
V
COM
= 2, 0, 2 V
4.5
3.0
W
3.0
I
NC(OFF)
I
NO(OFF)
Switch Off
V
IN
= V
IL
or V
IH
V
IO
= V
CC
−1.0 V or V
EE
+1.0 V
(Figure 17)
6.0
3.0
0
−3.0
0.1
0.1
5.0
5.0
100
100
nA
I
COM(ON)
Maximum On−Channel
Leakage Current,
Channel−to−Channel
Switch On
V
IO
= V
CC
−1.0 V or V
EE
+1.0 V
(Figure 17)
6.0
3.0
0
−3.0
0.1
0.1
5.0
5.0
100
100
nA
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3
NLAST4051
AC CHARACTERISTICS
(Input t
r
= t
f
= 3 ns)
Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎ Î
Î
Î
Î
Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ Î ÎÎÎÎÎÎ Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ Î
Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎ Î
Î
Î
Guaranteed Limit
Symbol
t
BBM
Parameter
Test Conditions
V
CC
V
3.0
4.5
3.0
V
EE
V
−55 to 25°C
Min
1.0
1.0
1.0
Typ*
6.5
5.0
3.5
v85°C
−
−
−
v125°C
−
−
−
Unit
ns
Minimum Break−Before−Make Time
V
IN
= V
IL
or V
IH
V
IS
= V
CC
R
L
= 300
W,
C
L
= 35 pF
(Figure 19)
0.0
0.0
−3.0
*Typical Characteristics are at 25°C.
AC CHARACTERISTICS
(C
L
= 35 pF, Input t
r
= t
f
= 3 ns)
Guaranteed Limit
V
CC
V
2.5
3.0
4.5
3.0
2.5
3.0
4.5
3.0
2.5
3.0
4.5
3.0
V
EE
V
0
0
0
−3.0
0
0
0
−3.0
0
0
0
−3.0
−55 to 25°C
Min
Typ
Max
40
28
23
23
40
28
23
23
40
28
23
23
v85°C
Min
Max
45
30
25
25
45
30
25
25
45
30
25
25
v125°C
Min
Max
50
35
30
28
50
35
30
28
50
35
30
28
Unit
ns
Symbol
t
TRANS
Parameter
Transition Time
(Address Selection Time)
(Figure 18)
Turn−on Time
(Figures 14, 15, 20, and 21)
Enable to N
O
or N
C
Turn−off Time
(Figures 14, 15, 20, and 21)
Enable to N
O
or N
C
t
ON
ns
t
OFF
ns
Typical @ 25°C, V
CC
= 5.0 V
C
IN
C
NO
or C
NC
C
COM
C
(ON)
Maximum Input Capacitance,Select Inputs
Analog I/O
Common I/O
Feedthrough
8
10
10
1.0
pF
ADDITIONAL APPLICATION CHARACTERISTICS
(GND = 0 V)
V
CC
V
3.0
4.5
6.0
3.0
3.0
4.5
6.0
3.0
3.0
4.5
6.0
3.0
5.0
3.0
V
EE
V
0.0
0.0
0.0
−3.0
0.0
0.0
0.0
−3.0
0.0
0.0
0.0
−3.0
0.0
−3.0
Typ
25°C
80
90
95
95
−93
−93
−93
−93
−2
−2
−2
−2
9.0
12
Unit
MHz
Symbol
BW
Parameter
Maximum On−Channel
Bandwidth or Minimum
Frequency Response
Off−Channel Feedthrough
Isolation
Condition
V
IS
=
½
(V
CC
− V
EE
)
Source Amplitude = 0 dBm
(Figures 10 and 22)
f = 100 kHz; V
IS
=
½
(V
CC
− V
EE
)
Source = 0 dBm
(Figures 12 and 22)
V
IS
=
½
(V
CC
− V
EE
)
Source = 0 dBm
(Figures 10 and 22)
V
IN
= V
CC
to V
EE,
f
IS
= 1 kHz, t
r
= t
f
= 3 ns
R
IS
= 0
W,
C
L
= 1000 pF, Q = C
L
*
DV
OUT
(Figures 16 and 23)
f
IS
= 1 MHz, R
L
= 10 KW, C
L
= 50 pF,
V
IS
= 5.0 V
PP
sine wave
V
IS
= 6.0 V
PP
sine wave
(Figure 13)
V
ISO
dB
V
ONL
Maximum Feedthrough
On Loss
dB
Q
Charge Injection
pC
THD
Total Harmonic Distortion
THD + Noise
%
6.0
3.0
0.0
−3.0
0.10
0.05
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4
NLAST4051
TYPICAL CHARACTERISTICS
100
10
80
1
I
CC
(nA)
0.1
0.01
0.001
0.0001
0.00001
−40
V
CC
= 3.0 V
20
V
CC
= 5.0 V
−20
0
20
60
80
100
120
0
−4.0
−2.0
0
2.0
V
IS
(VDC)
4.0
6.0
R
ON
(W)
60
2.0 V
100
40
$3.3
V
3.0 V
4.5 V
5.5 V
Temperature (°C)
Figure 3. I
CC
versus Temp, V
CC
= 3 V and 5 V
50
Figure 4. R
ON
versus V
CC
, Temp = 255C
100
90
80
70
R
ON
(W)
60
50
40
30
20
10
0
−55°C
85°C
25°C
R
ON
(W)
125°C
125°C
40
25°C
85°C
30
20
−55°C
10
0
0.5
1.0
VCom (V)
1.5
2.0
0
0.5
1.0
1.5
VCom (V)
2.0
2.5
3.0
Figure 5. Typical On Resistance
V
CC
= 2.0 V, V
EE
= 0 V
25
125°C
20
85°C
20
15
25
85°C
Figure 6. Typical On Resistance
V
CC
= 3.0 V, V
EE
= 0 V
125°C
R
ON
(W)
R
ON
(W)
15
25°C
10
−55°C
5
10
25°C
−55°C
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VCom (V)
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VCom (V)
Figure 7. Typical On Resistance
V
CC
= 4.5 V, V
EE
= 0 V
www.onsemi.com
5
Figure 8. Typical On Resistance
V
CC
= 5.5 V, V
EE
= 0 V
Embedded System
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