SCANPSC110F datasheet, PDF - EEWORLD Datasheet

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SCANPSC110F: DescriptionSPECIALTY MICROPROCESSOR CIRCUIT, PDSO28; Categorysemiconductor The embedded processor and controller; File Size273KB，25 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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SCANPSC110F Overview

SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28

SCANPSC110F Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	28
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
Processing package description	0.300 INCH, PLASTIC, SOIC-28
state	TRANSFERRED
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
Microprocessor type	MICROPROCESSOR CIRCUIT

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SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test

Support)

March 1993

Revised August 2000

SCANPSC110F

SCAN Bridge Hierarchical and Multidrop Addressable

JTAG Port (IEEE1149.1 System Test Support)

General Description

The SCANPSC110F Bridge extends the IEEE Std. 1149.1

test bus into a multidrop test bus environment. The advan-

tage of a hierarchical approach over a single serial scan

chain is improved test throughput and the ability to remove

a board from the system and retain test access to the

remaining modules. Each SCANPSC110F Bridge supports

up to 3 local scan rings which can be accessed individually

or combined serially. Addressing is accomplished by load-

ing the instruction register with a value matching that of the

Slot inputs. Backplane and inter-board testing can easily

be accomplished by parking the local TAP Controllers in

one of the stable TAP Controller states via a Park instruc-

tion. The 32-bit TCK counter enables built in self test oper-

ations to be performed on one port while other scan chains

are simultaneously tested.

Features

True IEEE1149.1 hierarchical and multidrop addressable

capability

The 6 slot inputs support up to 59 unique addresses, a

Broadcast Address, and 4 Multi-cast Group Addresses

3 IEEE 1149.1-compatible configurable local scan ports

Mode Register allows local TAPs to be bypassed,

selected for insertion into the scan chain individually, or

serially in groups of two or three

32-bit TCK counter

16-bit LFSR Signature Compactor

local TAPs can be 3-stated via the OE input to allow an

alternate test master to take control of the local TAPs

Ordering Code:

Order Number

SCANPSC110FSC

Package Number

M28B

Package Description

28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

Names

TCK

TMS

TDI

TDO

TRST

(0,5)

Description

Backplane Test Clock Input

Backplane Test Mode Select Input

Backplane Test Data Input

Backplane Test Data Output

Asynchronous Test Reset Input (Active LOW)

Address Select Port

Local Scan Port Output Enable (Active LOW)

TCK

L(1–3)

Local Port Test Clock Output

TMS

L(1–3)

Local Port Test Mode Select Output

TDI

L(1–3)

Local Port Test Data Input

TDO

L(1–3)

Local Port Test Data Output

DS011570

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SCANPSC110F

TABLE 1. Glossary of Terms

LFSR

LSP

Local

Linear Feedback Shift Register. When enabled, will generate a 16-bit signature of sampled serial test

data.

Local Scan Port. A four signal port that drives a “local” (i.e. non-backplane) scan chain.

(e.g., TCK

, TMS

, TDO

, TDI

)

Local is used to describe IEEE Std. 1149.1 compliant scan rings and the SCANPSC110F Bridge Test

Access Port that drives them. The term “local” was adopted from the system test architecture that the

SCANPSC110F Bridge will most commonly be used in; namely, a system test backplane with a

SCANPSC110F Bridge on each card driving up to 3 “local” scan rings per card. (Each card can contain

multiple SCANPSC110Fs, with 3 local scan ports per SCANPSC110F.)

Park, parked, unpark, and unparked, are used to describe the state of the LSP controller and the state

of the local TAP controllers (the “local TAP controllers” refers to the TAP controllers of the scan compo-

nents that make up a local scan ring). Park is also used to describe the action of parking a LSP (transi-

tioning into one of the Parked LSP controller states). It is important to understand that when a LSP

controller is in one of the parked states, TMS

is held constant, thereby holding or “parking” the local

TAP controllers in a given state.

Test Access Port as defined by IEEE Std. 1149.1

Park/Unpark

TAP

Selected/Unselected

Selected and Unselected refers to the state of the SCANPSC110F Bridge Selection Controller. A

selected SCANPSC110F has been properly addressed and is ready to receive Level 2 protocol. Unse-

lected SCANPSC110Fs monitor the system test backplane, but do not accept Level 2 protocol (except

for the

GOTOWAIT

instruction). The data registers and LSPs of unselected SCANPSC110Fs are not

accessible from the system test master.

Active Scan Chain

The Active Scan Chain refers to the scan chain configuration as seen by the test master at a given

moment. When a SCANPSC110F is selected with all of its LSPs parked, the active scan chain is the

current scan bridge register only. When a LSP is unparked, the active scan chain becomes: TDI

→

the

current SCANPSC110F register

→

the local scan ring registers

→

a PAD bit

→

TDO

. Refer to Table 4

for Unparked configurations of the LSP network.

Level 1 is the protocol used to address a SCANPSC110F.

Level 2 is the protocol that is used once a SCANPSC110F is selected. Level 2 protocol is IEEE Std.

1149.1 compliant when an individual SCANPSC110F is selected.

A one bit register that is placed at the end of each local scan port scan-chain. The PAD bit eliminates

the prop delay that would be added by the SCANPSC110F LSPN logic between TDI

and TDO

L(n+1)

or TDO

by buffering and synchronizing the TDI

inputs to the falling edge of TCK

, thus allowing data

to be scanned at higher frequencies without violating set-up and hold times.

Least Significant Bit, the right-most position in a register (bit 0)

Most Significant Bit, the left-most position in a register

Level 1 Protocol

Level 2 Protocol

PAD

LSB

MSB

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SCANPSC110F Related Products

	SCANPSC110F	SCANPSC110FSC
Description	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28
Number of terminals	28	28
Maximum operating temperature	85 Cel	85 °C
Minimum operating temperature	-40 Cel	-40 °C
surface mount	Yes	YES
Terminal form	GULL WING	GULL WING
Terminal location	DUAL	DUAL
Temperature level	INDUSTRIAL	INDUSTRIAL

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