CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Input is protected by back-to-back zener diodes. See applications section.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
3.
θJA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
Input Offset Voltage
V
SUPPLY
=
±15V,
Unless Otherwise Specified
TEST CONDITIONS
TEMP. (
o
C)
MIN
TYP
MAX
UNITS
25
Full
-
-
-
-
-
-
-
-
-
±12
-
-
-
-
-
-
-
-
-
0.30
0.35
0.5
40
70
15
30
400
-
-
70
0.25
6.2
3.6
3.4
4.7
1.8
0.97
<0.005
0.75
1.5
-
100
200
100
150
750
1500
-
-
-
10
6
4.0
8.0
2.8
1.8
-
mV
mV
µV/
o
C
nA
nA
nA
nA
µV
µV
V
kΩ
µV
P-P
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
pA/√Hz
%
Average Offset Voltage Drift
Input Bias Current
Full
25
Full
Input Offset Current
25
Full
Input Offset Voltage Match
25
Full
Common Mode Range
Differential Input Resistance
Input Noise Voltage
f = 0.1Hz to 10Hz
25
25
25
25
25
25
25
25
25
25
Input Noise Voltage Density (Notes 3, 11) f = 10Hz
f = 100Hz
f = 1000Hz
Input Noise Current Density (Notes 3, 11) f = 10Hz
f = 100Hz
f = 1000Hz
THD+N
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
Note 5
Note 4
25
Full
106
100
86
-
128
120
95
35
-
-
-
-
dB
dB
dB
MHz
CMRR
Unity Gain Bandwidth
V
CM
=
±10V
-3dB
Full
25
2
HA-5221
Electrical Specifications
PARAMETER
Gain Bandwidth Product
Minimum Stable Gain
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
L
= 333Ω
R
L
= 1kΩ
R
L
= 1kΩ
Output Current
Output Resistance
Full Power Bandwidth
TRANSIENT RESPONSE
(Note 11)
Slew Rate
Rise Time
Overshoot
Settling Time (Notes 9, 10)
Notes 7, 11
Notes 8, 11
Notes 8, 11
0.1%
0.01%
POWER SUPPLY
PSRR
Supply Current
NOTES:
4. Refer to typical performance curve in data sheet.
5. A
VCL
= 10, f
O
= 1kHz, V
O
= 5V
RMS
, R
L
= 600Ω, 10Hz to 100kHz, minimum resolution of test equipment is 0.005%.
6. V
OUT
= 0 to
±10V,
R
L
= 1kΩ, C
L
= 50pF.
Slew Rate
-
7. Full Power Bandwidth is calculated by: FPBW =
--------------------------
,
V
PEAK
=
10V .
2πV
PEAK
8. V
OUT
=
±2.5V,
R
L
= 1kΩ, C
L
= 50pF.
9. V
OUT
=
±100mV,
R
L
= 1kΩ, C
L
= 50pF.
10. Settling time is specified for a 10V step and A
V
= -1.
11. See Test Circuits.
12. Guaranteed by characterization.
V
S
=
±10V
to
±20V
Full
Full
86
-
100
8
-
11
dB
mA
Full
Full
Full
25
25
15
-
-
-
-
25
13
28
0.4
1.5
-
20
50
-
-
V/µs
ns
%
µs
µs
Note 6
V
OUT
=
±10V
Full
25
Full
Full
25
25
±10
±12
±11.5
±30
-
239
-
±12.5
±12.1
±56
10
398
-
-
-
-
-
-
V
V
V
mA
Ω
kHz
V
SUPPLY
=
±15V,
Unless Otherwise Specified
(Continued)
TEST CONDITIONS
1kHz to 400kHz
TEMP. (
o
C)
25
Full
MIN
-
1
TYP
100
-
MAX
-
-
UNITS
MHz
V/V
Test Circuits and Waveforms
V
IN
+
-
V
OUT
1kΩ
50pF
FIGURE 1. TRANSIENT RESPONSE TEST CIRCUIT
3
HA-5221
Test Circuits and Waveforms
(Continued)
2.5V
0V
100mV
V
IN
0V
-100mV
-2.5V
2.5V
100mV
V
OUT
0V
0V
-100mV
-2.5V
V
OUT
= ±2.5V
Vertical Scale = 2V/Div.,
Horizontal Scale = 200ns/Div.
FIGURE 2. LARGE SIGNAL RESPONSE
V
OUT
=
±100mV
Vertical Scale = 100mV/Div.,
Horizontal Scale = 200ns/Div.
FIGURE 3. SMALL SIGNAL RESPONSE
V
SETTLE
5K
5K
2K
2K
V
IN
+
V
OUT
NOTES:
13. A
V
= -1.
14. Feedback and summing resistors must be matched (0.1%).
15. HP5082-2810 clipping diodes recommended.
16. Tektronix P6201 FET probe used at settling point.
FIGURE 4. SETTLING TIME TEST CIRCUIT
Application Information
Operation at Various Supply Voltages
The HA-5221 operates over a wide range of supply voltages
with little variation in performance. The supplies may be
varied from
±5V
to
±15V.
See typical performance curves for
variations in supply current, slew rate and output voltage
swing.
+15V
7
2
3
R
P
1
8
+
4
6
Offset Adjustment
The following diagram shows the offset voltage adjustment
configuration for the HA-5221. By moving the potentiometer
wiper towards pin 8 (+BAL), the op amps output voltage will
increase; towards pin 1 (-BAL) decreases the output voltage.
A 20kΩ trim pot will allow an offset voltage adjustment of
about 10mV.
-15V
Capacitive Loading Considerations
When driving capacitive loads >80pF, a small resistor, 50Ω
to 100Ω, should be connected in series with the output and
inside the feedback loop.
4
HA-5221
Saturation Recovery
When an op amp is over driven, output devices can saturate
and sometimes take a long time to recover. By clamping the
input, output saturation can be avoided. If output saturation
can not be avoided, the maximum recovery time when
overdriven into the positive rail is 10.6µs. When driven into
the negative rail the maximum recovery time is 3.8µs.
∆V
IN
R
LIMIT
2
6
R
LIMIT
3
+
V
OUT
PC Board Layout Guidelines
When designing with the HA-5221, good high frequency
(RF) techniques should be used when building a PC board.
Use of ground plane is recommended. Power supply
decoupling is very important. A 0.01µF to 0.1µF high quality
ceramic capacitor at each power supply pin with a 2.2µF to
10µF tantalum close by will provide excellent decoupling.
Chip capacitors produce the best results due to ease of
placement next to the op amp and basically no lead
inductance. If leaded capacitors are used, the leads should
be kept as short as possible to minimize lead inductance.
Input Protection
The HA-5221 has built in back-to-back protection diodes
which limit the maximum allowable differential input voltage
to approximately 5V. If the HA-5221 is used in circuits where
the maximum differential voltage may be exceeded, then
current limiting resistors must be used. The input current
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