CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
7.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
Electrical Specifications
PARAMETER
SYSTEM PERFORMANCE
Zero Input Reading
Stability (Last Digit) (ICL7107S Only)
Ratiometric Reading
Rollover Error
(Note
8)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
IN
= 0.0V, full scale = 200mV
Fixed input voltage (Note
11)
V
lN
= V
REF
, V
REF
= 100mV
-V
IN
= +V
lN
200mV
Difference in reading for equal positive and negative inputs
near full scale
Full scale = 200mV or full scale = 2V maximum deviation
from best straight line fit (Note
10)
V
CM
= 1V, V
IN
= 0V, full scale = 200mV (Note
10)
V
IN
= 0V, full scale = 200mV
(peak-to-peak value not exceeded 95% of time)
V
lN
= 0 (Note
10)
V
lN
= 0, 0°C to +70°C (Note
10)
V
IN
= 199mV, 0°C to +70°C
,
(ext. ref. 0ppm/×°C) (Note
10)
V
IN
= 0 (does not include LED current for ICL7107)
ICL7107 Only
25kΩ between common and positive supply (with respect
to + supply)
25kΩ between common and positive supply (with respect
to + supply)
-000.0
-000.0
999
-
000.0
000.0
+000.0 Digital
Reading
+000.0 Digital
Reading
Digital
Reading
Counts
999/1000 1000
±0.2
±1
Linearity
Common Mode Rejection Ratio
Noise
Leakage Current Input
Zero Reading Drift
Scale Factor Temperature Coefficient
End Power Supply Character V+ Supply Current
End Power Supply Character V- Supply Current
COMMON Pin Analog Common Voltage
Temperature Coefficient of Analog Common
DISPLAY DRIVER ICL7106 ONLY
Peak-to-Peak Segment Drive Voltage
Peak-to-Peak Backplane Drive Voltage
-
-
-
-
-
-
-
-
2.4
-
±0.2
50
15
1
0.2
1
1.0
0.6
3.0
80
±1
-
-
10
1
5
1.8
1.8
3.2
-
Counts
µV/V
µV
pA
µV/°C
ppm/°C
mA
mA
V
ppm/°C
V+ = to V- = 9V (Note
9)
4
5.5
6
V
FN3082 Rev 9.00
October 24, 2014
Page 3 of 17
ICL7106, ICL7107, ICL7107S
Electrical Specifications
PARAMETER
DISPLAY DRIVER ICL7107 ONLY
Segment Sinking Current
(Note
8)
(Continued)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V+ = 5V, segment voltage = 3V
5
10
4
8
16
7
-
-
-
mA
mA
mA
Except Pins AB4 and POL
Pin AB4 Only
Pin POL Only
NOTES:
8. Unless otherwise noted, specifications apply to both the ICL7106 and ICL7107 at T
A
= +25°C, fCLOCK = 48kHz. ICL7106 is tested in the circuit of
Figure 1.
ICL7107 is tested in the circuit of
Figure 2.
9. Back plane drive is in phase with segment drive for “off” segment, 180 degrees out of phase for “on” segment. Frequency is 20 times conversion rate.
Average DC component is less than 50mV.
10. Limit is not production tested. The maximum was established via characterization and/or design simulations.
11. Sample tested.
Typical Applications and Test Circuits
+
R
1
R
3
OSC 1 40
OSC 2 39
OSC 3 38
C
4
TEST 37
R
4
C
1
R
5
C
5
C
2
R
2
C
3
DISPLAY
REF HI 36
REF LO 35
C
REF
+ 34
C
REF
- 33
COM 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V- 26
G2 25
C3 24
A3 23
G3 22
ICL7106
20 POL
19 AB4
G1
D1
C1
B1
A1
D2
10 C2
11 B2
12 A2
15 D3
16 B3
V+
E1
14 E2
18 E3
F1
13 F2
17 F3
1
2
3
4
5
6
7
8
9
DISPLAY
FIGURE 1. ICL7106 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
+5V
R
1
R
3
OSC 1 40
OSC 2 39
OSC 3 38
C
4
TEST 37
R
4
C
1
R
5
+
IN
-
-5V
C
5
C
2
R
2
C
3
DISPLAY
BP 21
REF HI 36
REF LO 35
C
REF
+ 34
C
REF
- 33
COM 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V- 26
G2 25
C3 24
A3 23
G3 22
ICL7107
20 POL
19 AB4
G1
D1
C1
B1
A1
D2
10 C2
11 B2
12 A2
15 D3
16 B3
V+
E1
14 E2
18 E3
F1
13 F2
17 F3
1
2
3
4
5
6
7
8
9
DISPLAY
FIGURE 2. ICL7107 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
FN3082 Rev 9.00
October 24, 2014
GND 21
-
C
1
= 0.1µF
C
2
= 0.47µF
C
3
= 0.22µF
C
4
= 100pF
C
5
= 0.02µF
R
1
= 24kΩ
R
2
= 47kΩ
R
3
= 100kΩ
R
4
= 1kΩ
R
5
= 1MΩ
C
1
= 0.1µF
C
2
= 0.47µF
C
3
= 0.22µF
C
4
= 100pF
C
5
= 0.02µF
R
1
= 24kΩ
R
2
= 47kΩ
R
3
= 100kΩ
R
4
= 1kΩ
R
5
= 1MΩ
+
IN
-
9V
Page 4 of 17
ICL7106, ICL7107, ICL7107S
Design Information Summary Sheet
• OSCILLATOR FREQUENCY
f
OSC
= 0.45/RC
C
OSC
> 50pF; R
OSC
> 50kΩ
f
OSC
(Typ) = 48kHz
• OSCILLATOR PERIOD
t
OSC
= RC/0.45
• INTEGRATION CLOCK FREQUENCY
f
CLOCK
= f
OSC
/4
• INTEGRATION PERIOD
t
INT
= 1000 x (4/f
OSC
)
• 60/50Hz REJECTION CRITERION
t
INT
/t
60Hz
or t
lNT
/t
60Hz
= Integer
• OPTIMUM INTEGRATION CURRENT
I
INT
= 4µA
• FULL SCALE ANALOG INPUT VOLTAGE
V
lNFS
(Typ) = 200mV or 2V
• INTEGRATE RESISTOR
V
INFS
R
INT
= ----------------
-
I
INT
• DISPLAY COUNT
V
IN
COUNT
=
1000
--------------
-
V
REF
• CONVERSION CYCLE
t
CYC
= t
CL0CK
x 4000
t
CYC
= t
OSC
x 16,000
when f
OSC
= 48kHz; t
CYC
= 333ms
• COMMON MODE INPUT VOLTAGE
(V- + 1V) < V
lN
< (V+ - 0.5V)
• AUTO-ZERO CAPACITOR
0.01µF < C
AZ
< 1µF
• REFERENCE CAPACITOR
0.1µF < C
REF
< 1µF
• V
COM
Biased between Vi and V-.
• V
COM
V+ - 2.8V
Regulation lost when V+ to V- <
6.8V
If V
COM
is externally pulled down to (V+ to V-)/2,
the V
COM
circuit will turn off.
• ICL7106 POWER SUPPLY: SINGLE 9V
V+ - V- = 9V
Digital supply is generated internally
V
GND
V+ - 4.5V
• ICL7106 DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude.
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