®
CT
O D U EM E N T
R
TE P PLAC
OL E
E
O B S N D ED R
15
E
Data Sheet
55
OM M
HC
RE C
HC5526
August 2003
FN4151.8
ITU CO/PABX SLIC with Low Power
Standby
The HC5526 is a subscriber line interface circuit that is
compliant with CCITT standards. Enhancements include
immunity to circuit latch-up during hot plug and absence of
false signaling in the presence of longitudinal currents.
The HC5526 is fabricated in a High Voltage Dielectrically
Isolated (DI) Bipolar Process that eliminates leakage
currents and device latch-up problems normally associated
with Junction Isolated (JI) ICs. The elimination of the leakage
currents results in improved circuit performance for wide
temperature extremes. The latch free benefit of the DI
process guarantees operation under adverse transient
conditions. This process feature makes the HC5526 ideally
suited for use in harsh outdoor environments.
Features
• DI Monolithic High Voltage Process
• Programmable Current Feed . . . . . . . . . . . 20mA to 60mA
• Programmable Loop Current Detector Threshold and
Battery Feed Characteristics
• Ground Key and Ring Trip Detection
• Compatible with Ericsson’s PBL3764
• Thermal Shutdown
• On-Hook Transmission
• Wide Battery Voltage Range . . . . . . . . . . . . . -24V to -58V
• Low Standby Power
• Meets CCITT Transmission Requirements
• Ambient Temperature Range . . . . . . . . . . . -40
o
C to 85
o
C
PKG.
DWG. #
N28.45
Part Number Information
PART NUMBER
HC5526CM
TEMP.
RANGE (
o
C)
0 to 70
PACKAGE
28 Ld PLCC
Applications
• On-Premises (ONS)
• Key Systems
• PBX
• Related Literature
- AN9537, Operation of the HC5513/26 Evaluation Board
Pinout
HC5526 (PLCC)
TOP VIEW
RING
SENSE
TIP
SENSE
26
BGND
RINGX
28
4
3
2
1
27
RINGRLY
V
BAT
R
SG
E1
E0
5
6
7
8
9
TIPX
V
CC
N/C
25 DR
24 N/C
23 DT
22 RD
21 HPT
20 HPR
19 V
TX
N/C 10
DET 11
12
C2
13
C1
14
R
DC
15
AGND
16
RSN
17
N/C
18
V
EE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
HC5526
Pin Descriptions
PLCC
1
2
4
5
6
7
8
9
11
SYMBOL
DESCRIPTION
RING
SENSE
Internally connected to output of RING power amplifier.
BGND
V
CC
RINGRLY
V
BAT
R
SG
E1
E0
DET
Battery Ground - To be connected to zero potential. All loop current and longitudinal current flow from this ground.
Internally separate from AGND but it is recommended that it is connected to the same potential as AGND.
5V power supply.
Ring relay driver output.
Battery supply voltage, -24V to -56V.
Saturation guard programming resistor pin.
TTL compatible logic input. The logic state of E1 in conjunction with the logic state of C1 determines which detector is
gated to the DET output.
TTL compatible logic input. Enables the DET output when set to logic level zero and disables DET output when set to
a logic level one.
Detector output. TTL compatible logic output. A zero logic level indicates that the selected detector was triggered (see
Truth Table for selection of Ground Key detector, Loop Current detector or the Ring Trip detector). The DET output is
an open collector with an internal pull-up of approximately 15kΩ to VCC.
TTL compatible logic input. The logic states of C1 and C2 determine the operating states (Open Circuit, Active, Ringing
or Standby) of the SLIC.
TTL compatible logic input. The logic states of C1 and C2 determine the operating states (Open Circuit, Active, Ringing
or Standby) of the SLIC.
DC feed current programming resistor pin. Constant current feed is programmed by resistors R
DC1
and R
DC2
connected in series from this pin to the receive summing node (RSN). The resistor junction point is decoupled to AGND
to isolate the AC signal components.
Analog ground.
Receive Summing Node. The AC and DC current flowing into this pin establishes the metallic loop current that flows
between tip and ring. The magnitude of the metallic loop current is 1000 times greater than the current into the RSN
pin. The constant current programming resistors and the networks for program receive gain and 2-wire impedance all
connect to this pin.
-5V power supply.
Transmit audio output. This output is equivalent to the TIP to RING metallic voltage. The network for programming the
2-wire input impedance connects between this pin and RSN.
RING side of AC/DC separation capacitor C
HP
. C
HP
is required to properly separate the ring AC current from the DC
loop current. The other end of C
HP
is connected to HPT.
TIP side of AC/DC separation capacitor C
HP
. C
HP
is required to properly separate the tip AC current from the DC loop
current. The other end of C
HP
is connected to HPR.
Loop current programming resistor. Resistor R
D
sets the trigger level for the loop current detect circuit. A filter capacitor
C
D
is also connected between this pin and V
EE
.
Input to ring trip comparator. Ring trip detection is accomplished by connecting an external network to a comparator in
the SLIC with inputs DT and DR.
Input to ring trip comparator. Ring trip detection is accomplished by connecting an external network to a comparator in
the SLIC with inputs DT and DR.
Internally connected to output of tip power amplifier.
Output of tip power amplifier.
Output of ring power amplifier.
No internal connection.
12
13
14
C2
C1
R
DC
15
16
AGND
RSN
18
19
20
21
22
23
25
26
27
28
3, 10, 17,
24
V
EE
V
TX
HPR
HPT
RD
DT
DR
TIP
SENSE
TIPX
RINGX
N/C
2
HC5526
Block Diagram
RING RELAY
DRIVER
4-WIRE
INTERFACE
VF SIGNAL
PATH
RINGRLY
V
TX
RSN
DT
DR
RING TRIP
DETECTOR
TIP
RING
HPT
HPR
GROUND KEY
DETECTOR
V
BAT
V
CC
V
EE
AGND
BGND
BIAS
R
D
R
DC
RSG
DET
DIGITAL
MULTIPLEXER
2-WIRE
INTERFACE
LOOP CURRENT
DETECTOR
E0
E1
C1
C2
3
HC5526
Absolute Maximum Ratings
Operating Temperature Range . . . . . . . . . . . . . . . . -40
o
C to 110
o
C
Power Supply (-40
o
C
≤
T
A
≤
85
o
C)
Supply Voltage V
CC
to GND . . . . . . . . . . . . . . . . . . . . 0.5V to 7V
Supply Voltage V
EE
to GND. . . . . . . . . . . . . . . . . . . . . -7V to 0.5V
Supply Voltage V
BAT
to GND . . . . . . . . . . . . . . . . . . . -70V to 0.5V
Ground
Voltage between AGND and BGND . . . . . . . . . . . . . -0.3V to 0.3V
Relay Driver
Ring Relay Supply Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 20V
Ring Relay Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Ring Trip Comparator
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
BAT
to 0V
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA to 5mA
Digital Inputs, Outputs (C1, C2, E0, E1, DET)
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to V
CC
Output Voltage (DET Not Active) . . . . . . . . . . . . . . . . . 0V to V
CC
Output Current (DET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Tipx and Ringx Terminals (-40
o
C
≤
T
A
≤
85
o
C)
Tipx or Ringx Voltage, Continuous (Referenced to GND) V
BAT
to 2V
Tipx or Ringx, Pulse < 10ms, T
REP
> 10s . . . . . .V
BAT
-20V to 5V
Tipx or Ringx, Pulse < 10µs, T
REP
> 10s . . . . V
BAT
-40V to 10V
Tipx or Ringx, Pulse < 250ns, T
REP
> 10s. . . . V
BAT
-70V to 15V
Tipx or Ringx Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70mA
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
28 Lead PLCC Package. . . . . . . . . . . . . . . . . . . . . .
53
Continuous Dissipation at 70
o
C
28 Lead PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5W
Package Power Dissipation at 70
o
C, t < 100ms, t
REP
> 1s
28 Lead PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4W
Derate above . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
o
C
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18.8mW/
o
C
Maximum Junction Temperature Range . . . . . . . . . -40
o
C to 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(PLCC - Lead Tips Only)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . 543 Transistors, 51 Diodes
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Typical Operating Conditions
These represent the conditions under which the part was developed and are suggested as guidelines.
PARAMETER
Case Temperature
V
CC
with Respect to AGND
V
EE
with Respect to AGND
V
BAT
with Respect to BGND
0
o
C to 70
o
C
0
o
C to 70
o
C
0
o
C to 70
o
C
CONDITIONS
MIN
-40
4.75
-5.25
-58
TYP
-
-
-
-
MAX
100
5.25
-4.75
-24
UNITS
o
C
V
V
V
Electrical Specifications
PARAMETER
Overload Level
Longitudinal Impedance (Tip/Ring)
T
A
= 0
o
C to 70
o
C, V
CC
= 5V
±5%,
V
EE
= -5V
±5%,
V
BAT
= -28V, AGND = BGND = 0V, R
DC1
= R
DC2
= 41.2kΩ,
R
D
= 39kΩ, R
SG
=
∞,
R
F1
= R
F2
= 0Ω, C
HP
= 10nF, C
DC
= 1.5µF, Z
L
= 600Ω.
CONDITIONS
1% THD, Z
L
= 600Ω, (Note 2, Figure 1)
0 < f < 100Hz (Note 3, Figure 2)
MIN
3.1
-
TYP
-
20
MAX
-
35
UNITS
V
PEAK
Ω/Wire
1V
RMS
TIP
27
R
L
600Ω
I
DCMET
23mA
RING
28
RSN
16
V
TX
19
R
T
600kΩ
E
RX
0 < f < 100Hz
E
L
C
2.16µF
300Ω
300Ω
A
T
V
T
TIP
27
V
TX
19
R
T
600kΩ
V
TRO
V
R
A
R
RING
28
RSN
16
R
RX
300kΩ
LZ
R
= V
R
/A
R
R
RX
300kΩ
LZ
T
= V
T
/A
T
FIGURE 1. OVERLOAD LEVEL (TWO-WIRE PORT)
FIGURE 2. LONGITUDINAL IMPEDANCE
4
HC5526
Electrical Specifications
PARAMETER
LONGITUDINAL CURRENT LIMIT (TIP/RING)
Off-Hook (Active)
On-Hook (Standby), R
L
=
∞
No False Detections (Loop Current),
LB > 45dB (Note 4, Figure 3A)
No False Detections (Loop Current)
(Note 5, Figure 3B)
-
-
-
-
20
5
mA
PEAK
/
Wire
mA
PEAK
/
Wire
T
A
= 0
o
C to 70
o
C, V
CC
= 5V
±5%,
V
EE
= -5V
±5%,
V
BAT
= -28V, AGND = BGND = 0V, R
DC1
= R
DC2
= 41.2kΩ,
R
D
= 39kΩ, R
SG
=
∞,
R
F1
= R
F2
= 0Ω, C
HP
= 10nF, C
DC
= 1.5µF, Z
L
= 600Ω.
(Continued)
CONDITIONS
MIN
TYP
MAX
UNITS
368Ω
A
C
E
L
2.16µF
-5V
R
DC2
A
368Ω
RING
R
DC
14 41.2kΩ
28
DET
39kΩ
R
D
R
DC1
41.2kΩ
C
DC
1.5µF
TIP
27
RSN
16
368Ω
A
2.16µF
E
L
2.16µF
C
39kΩ
R
D
-5V
C
R
DC2
A
368Ω
R
DC
RING
14 41.2kΩ
28
DET
TIP
27
RSN
16
R
DC1
41.2kΩ
C
DC
1.5µF
FIGURE 3A. OFF-HOOK
FIGURE 3. LONGITUDINAL CURRENT LIMIT
OFF-HOOK LONGITUDINAL BALANCE
Longitudinal to Metallic
Longitudinal to Metallic
Metallic to Longitudinal
IEEE 455 - 1985, R
LR
, R
LT
= 368Ω,
0.2kHz < f < 4.0kHz (Note 6, Figure 4)
R
LR
, R
LT
= 300Ω, 0.2kHz < f < 4.0kHz
(Note 6, Figure 4)
FCC Part 68, Para 68.310
0.2kHz < f < 1.0kHz
1.0kHz < f < 4.0kHz (Note 7)
Longitudinal to 4-Wire
Metallic to Longitudinal
4-Wire to Longitudinal
0.2kHz < f < 4.0kHz (Note 8, Figure 4)
R
LR
, R
LT
= 300Ω, 0.2kHz < f < 4.0kHz
(Note 9, Figure 5)
0.2kHz < f < 4.0kHz (Note 10, Figure 5)
FIGURE 3B. ON-HOOK
53
53
50
50
53
50
50
60
60
55
55
60
55
55
-
-
-
-
-
-
-
dB
dB
dB
dB
dB
dB
dB
R
LT
TIP
27
E
L
C
V
TR
2.16µF
R
RX
R
LR
RING
28
RSN
16
300kΩ
V
TX
19
R
T
600kΩ
V
TX
V
L
2.16µF
C
R
LT
300Ω
E
TR
TIP
27
V
TX
19
R
T
600kΩ
R
RX
RING
28
RSN
16
300kΩ
E
RX
R
LR
300Ω
FIGURE 4. LONGITUDINAL TO METALLIC AND
LONGITUDINAL TO 4-WIRE BALANCE
2-Wire Return Loss
C
HP
= 20nF
FIGURE 5. METALLIC TO LONGITUDINAL AND 4-WIRE TO
LONGITUDINAL BALANCE
25
27
23
-
-
-
-
-
-
dB
dB
dB
0.2kHz to 0.5kHz (Note 11, Figure 6)
0.5kHz to 1.0kHz (Note 11, Figure 6)
1.0kHz to 3.4kHz (Note 11, Figure 6)
5
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