flip-flops with individual D-type inputs and 3-STATE true
outputs. The device is byte controlled with each byte func-
tioning identically, but independent of the other. The control
pins can be shorted together to obtain full 16-bit operation.
Each byte has a buffered clock and buffered Output Enable
common to all flip-flops within that byte. The description
which follows applies to each byte. Each flip-flop will store
the state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP
n
)
transition. With the Output Enable (OE
n
) LOW, the con-
tents of the flip-flops are available at the outputs. When
OE
n
is HIGH, the outputs go to the high impedance state.
Operation of the OE
n
input does not affect the state of the
flip-flops.
Logic Diagrams
Byte 1 (0:7)
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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74LCXH16374
Absolute Maximum Ratings
(Note 3)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
OE
1
, CP
n
Parameter
Value
Conditions
Units
V
V
3-STATE
Output in HIGH or LOW State (Note 4)
V
I
GND
V
O
GND
V
O
!
V
CC
V
mA
mA
mA
mA
mA
0.5 to
7.0
I
0
- I
15
0.5 to V
CC
0.5
0.5V to 7.0V
0.5 to
7.0
0.5 to V
CC
0.5
50
50
50
r
50
r
100
r
100
65 to
150
q
C
Recommended Operating Conditions
(Note 5)
Symbol
V
CC
V
I
V
O
I
OH
/I
OL
Supply Voltage
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
V
CC
V
CC
T
A
Free-Air Operating Temperature
Input Edge Rate, V
IN
0.8V–2.0V, V
CC
3.0V
3.0V
3.6V
2.7V
3.0V
2.3V
2.7V
Parameter
Operating
Data Retention
Min
2.0
1.5
0
0
0
Max
3.6
3.6
V
CC
V
CC
5.5
Units
V
V
V
r
24
r
12
r
8
40
0
85
10
mA
q
C
ns/V
'
t/
'
V
Note 3:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 4:
I
O
Absolute Maximum Rating must be observed.
Note 5:
Floating or unused control inputs must be HIGH or LOW.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
I
OH
V
OL
LOW Level Output Voltage
I
OL
I
OL
I
OL
I
OL
I
OL
I
I
Input Leakage Current
Data
Control
V
I
Conditions
V
CC
(V)
2.3
2.7
2.7
3.6
2.3
2.7
2.7
3.6
T
A
40
q
C to
85
q
C
Max
Units
Min
1.7
2.0
V
0.7
0.8
V
100
P
A
8 mA
12 mA
18 mA
24 mA
100
P
A
8 mA
12 mA
16 mA
24 mA
V
CC
or GND
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
3.6
V
CC
0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
V
V
r
5.0
r
5.0
0V
d
V
I
d
5.5
P
A
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4
74LCXH16374
DC Electrical Characteristics
Symbol
I
I(HOLD)
Parameter
Bushold Input Minimum
Drive Hold Current
(Continued)
V
CC
(V)
V
IN
V
IN
V
IN
V
IN
0.7V
1.7V
0.8V
2.0V
2.3
3.0
2.7
3.6
2.3
3.6
0
2.3
3.6
2.3
3.6
2.3
3.6
T
A
Conditions
40
q
C to
85
q
C
Max
45
Units
Min
45
75
P
A
75
300
I
I(OD)
Bushold Input Over-Drive
Current to Change State
(Note 7)
(Note 8)
(Note 7)
(Note 8)
300
450
P
A
450
r
5.0
10
20
I
OZ
I
OFF
I
CC
3-STATE Output Leakage
Power-Off Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
0
d
V
O
d
5.5V
V
O
V
I
V
IH
V
CC
V
CC
or GND
V
CC
0.6V
P
A
P
A
P
A
P
A
3.6V
d
V
O
d
5.5V (Note 6)
r
20
500
'
I
CC
Note 6:
Outputs disabled or 3-STATE only.
Note 7:
An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 8:
An external driver must sink at least the specified current to switch from HIGH-to-LOW.
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
C
L
Min
f
MAX
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
t
S
t
H
t
W
t
OSHL
t
OSLH
Setup Time
Hold Time
Pulse Width
Output to Output Skew (Note 9)
Output Disable Time
Maximum Clock Frequency
Propagation Delay
CP to O
n
Output Enable time
170
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.0
1.0
1.0
6.2
6.2
6.1
6.1
6.0
6.0
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.0
6.5
6.5
6.3
6.3
6.2
6.2
1.5
1.5
1.5
1.5
1.5
1.5
3.0
2.0
3.5
7.4
7.4
7.9
7.9
7.2
7.2
3.3V
r
0.3V
50 pF
Max
40
q
to
85
q
C, R
L
V
CC
C
L
Min
2.7V
50 pF
Max
500
:
V
CC
C
L
Min
2.5V
r
0.2V
30 pF
Max
MHz
ns
ns
ns
ns
ns
ns
ns
Units
Note 9:
Skew is defined as the absolute value of the differences between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
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