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74LVQ08SC

Description
Low Voltage Quad 2-Input AND Gate
Categorylogic    logic   
File Size49KB,5 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74LVQ08SC Overview

Low Voltage Quad 2-Input AND Gate

74LVQ08SC Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instruction0.150 INCH, MS-012, SOIC-14
Contacts14
Reach Compliance Codeunknow
Is SamacsysN
seriesLVQ
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length8.65 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeAND GATE
MaximumI(ol)0.012 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTUBE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su10 ns
propagation delay (tpd)14 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.7 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
74LVQ08 Low Voltage Quad 2-Input AND Gate
February 1992
Revised June 2001
74LVQ08
Low Voltage Quad 2-Input AND Gate
General Description
The LVQ08 contains four, 2-input AND gates.
Features
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Guaranteed incident wave switching into 75
Ordering Code:
Order Number
74LVQ08SC
74LVQ08SJ
Package
Number
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
© 2001 Fairchild Semiconductor Corporation
DS011344
www.fairchildsemi.com

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