ISL5416_04 datasheet, PDF - EEWORLD Datasheet

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ISL5416_04: DescriptionTELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256; CategoryTopical application Wireless rf/communication; File Size2MB，71 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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ISL5416_04 Overview

TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256

ISL5416_04 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	256
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Rated supply voltage	1.8 V
Processing package description	17 × 17 MM, lead FREE, plastic, BGA-256
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
packaging shape	SQUARE
Package Size	GRID array, low PROFILE
surface mount	Yes
Terminal form	BALL
Terminal spacing	1 mm
terminal coating	MATTE Tin
Terminal location	BOTTOM
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
Communication type	baseband circuit

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DATASHEET

ISL5416

Four-Channel Wideband Programmable DownConverter

The ISL5416 Four-Channel Wideband Programmable Digital

DownConverter (WPDC) is designed for high dynamic range

applications such as cellular basestations where the

processing of multiple channels is required in a small

physical space. The WPDC combines four channels in a

single package, each including: an NCO, a digital mixer,

digital filters, an AGC and a resampling filter.

All channels are independently programmable and may be

updated in real time. Each of the four channels can select

any of the four digital input buses. Each of the tuners can

process a W-CDMA channel. Channels may be cascaded or

polyphased for increased bandwidth. Selectable outputs

include I samples, Q samples, and AGC gain. Outputs from

the part are available over the parallel, serial or uP

interfaces.

FN6006

Rev 3.00

Aug 2004

Features

• Up to 95MSPS Input

• Four Parallel 16-bit Fixed or 17-bit Floating Point Inputs

• Programmable RF Attenuator/VGA Control

• 32-Bit Programmable Carrier NCO with > 110dB SFDR

• 20-bit Internal Data Path

• Filter Functions

- Multi-Stage Cascaded-Integrator-Comb (CIC) Filter

- Two programmable FIR Filters (first up to 32-taps,

second up to 64-taps)

- Half Band Interpolation Filter

- Resampling FIR Filter

• Overall decimation from 1 to >4096

• Digital AGC with up to 96dB of Gain Range

• Up to Four Independent 16-bit Parallel Outputs

• Serial Output Option

• 16-bit Parallel

P

Interface

• 1.8V core, 3.3V I/O Operation

• Evaluation Board and Configuration Software available

• Pb-free available

Ordering Information

PART

NUMBER

ISL5416KI

ISL5416KIZ

(See Note)

ISL5416EVAL1

TEMP

RANGE (

-40 to 85

PACKAGE

256 BGA

(Pb-free)

PKG. DWG. #

V256.17x17

EVALUATION KIT

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding

compounds/die attach materials and 100% matte tin plate termination finish, which is

compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free

products are MSL classified at Pb-free peak reflow temperatures that meet or exceed

the Pb-free requirements of IPC/JEDEC J Std-020B.

Applications

• Basestation Receivers: GSM/EDGE, CDMA2000, UMTS.

Block Diagram

TEST

OUTPUT

RANGE CONTROL

AOUT(15:8)

INPUT CHANNEL ROUTING

NCO I

MIXER

CIC

FIR1

FILTER

FIR2

FILTER

AGC

IHBF

RESAMPLER

OUTPUT ROUTING & FORMATTING

AOUT(7:0)

FSYNCA

OEA

AIN(16:0)

ENIA

CLKA

INPUT

SELECT

CLOCK &

FORMAT

INPUT A

INPUT B

INPUT C

INPUT D

CHANNEL O

CHANNEL 1

CHANNEL 2

CHANNEL 3

CLKO1

CLKO2

/INTRPT

EOUT(15:0)

RF ATTENUATOR

VGA CONTROL

JTAG

SYNCHRONIZATION

SYNCO SYNCIN1 SYNCIN2

P

INTERFACE

ADD(2:0)

uP MODE

RD or

RD/WR

FN6006 Rev 3.00

Aug 2004

P(15:0)

RESET

WR or

DSTRB

Page 1 of 71

ISL5416

Pin Descriptions

NAME

TYPE

INTERNAL

PULL-UP/DOWN

DESCRIPTION

POWER SUPPLY

Vcc

VccIO

GND

INPUTS

Ain(16:0)

Bin(16:0)

Cin(16:0)

Din(16:0)

ENIA

PULL DOWN

Parallel Data Input bus A. Sampled on the rising or falling edge (programmable) of clock when ENIA

is active (low). The bus order can be programmed (See IWA = 0*00h, bit 4).

Parallel Data Input bus B. Sampled on the rising or falling edge (programmable) of clock when ENIB

is active (low). The bus order can be programmed (See IWA = 0*00h, bit 4).

Parallel Data Input bus C. Sampled on the rising or falling edge (programmable) of clock when ENIC

is active (low). The bus order can be programmed (See IWA = 0*00h, bit 4).

Parallel Data Input bus D. Sampled on the rising or falling edge (programmable) of clock when ENID

is active (low). The bus order can be programmed (See IWA = 0*00h, bit 4).

Input enable for Parallel Data Input bus A. Active low. This pin enables the input to the part in one of

two modes, gated or interpolated. In gated mode, one sample is taken per CLK when ENIx is

asserted.

Input enable for Parallel Data Input bus B. Active low. This pin enables the input to the part in one of

two modes, gated or interpolated. In gated mode, one sample is taken per CLK when ENIx is

asserted.

Input enable for Parallel Data Input bus C. Active low. This pin enables the input to the part in one of

two modes, gated or interpolated. In gated mode, one sample is taken per CLK when ENIx is

asserted.

Input enable for Parallel Data Input bus D. Active low. This pin enables the input to the part in one of

two modes, gated or interpolated. In gated mode, one sample is taken per CLK when ENIx is

asserted.

Positive Power Supply Voltage (core), 1.8V

0.09

Positive Power Supply Voltage (I/O), 3.3V

0.165

Ground, 0V.

ENIB

PULL DOWN

ENIC

PULL DOWN

ENID

PULL DOWN

CONTROL

CLKA

CLKB

CLKC

CLKD

SYNCIn1

PULL DOWN

Input clock for data bus A. CLKA or CLKC may be used for Ain(16:0).

Input clock for data bus B. CLKB or CLKC may be used for Bin(16:0).

Input clock for data bus C. CLKC is also the master clock for all channels of ISL5416

Input clock for data bus D. CLKD or CLKC may be used for Din(16:0).

Global synchronization input signal 1. SYNCIn1 can update the carrier NCOs, reset decimation

counters, restart the filter, and restart the output section among other functions. For most of the

functional blocks, the response to SYNCIn1 is programmable and can be enabled or disabled.

Global synchronization input signal 2. SYNCIn2 can update the carrier NCOs, reset decimation

counters, restart the filter, and restart the output section among other functions. For most of the

functional blocks, the response to SYNCIn2 is programmable and can be enabled or disabled.

Synchronization Output Signal. The processing of multiple ISL5416 devices can be synchronized by

tying the SYNCO from one ISL5416 device (the master) to the SYNCIn of all the ISL5416 devices

(the master and slaves). An optional internal SYNCO to SYNCInX connection is provided.

PULL UP

Reset Signal. Active low. Asserting reset will halt all processing and set certain registers to default

values.

SYNCIn2

PULL DOWN

SYNCO

RESET

FN6006 Rev 3.00

Aug 2004

Page 4 of 71

ISL5416_04 Related Products

	ISL5416_04	ISL5416EVAL1	ISL5416KIZ	ISL5416
Description	TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256	TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256	TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256	TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256
Number of functions	1	1	1	1
Number of terminals	256	256	256	256
Maximum operating temperature	85 Cel	85 Cel	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel	-40 Cel	-40 Cel
Rated supply voltage	1.8 V	1.8 V	1.8 V	1.8 V
Processing package description	17 × 17 MM, lead FREE, plastic, BGA-256	17 × 17 MM, lead FREE, plastic, BGA-256	17 × 17 MM, lead FREE, plastic, BGA-256	17 × 17 MM, lead FREE, plastic, BGA-256
Lead-free	Yes	Yes	Yes	Yes
EU RoHS regulations	Yes	Yes	Yes	Yes
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE
packaging shape	SQUARE	SQUARE	SQUARE	SQUARE
Package Size	GRID array, low PROFILE	GRID array, low PROFILE	GRID array, low PROFILE	GRID array, low PROFILE
surface mount	Yes	Yes	Yes	Yes
Terminal form	BALL	BALL	BALL	BALL
Terminal spacing	1 mm	1 mm	1 mm	1 mm
terminal coating	MATTE Tin	MATTE Tin	MATTE Tin	MATTE Tin
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Communication type	baseband circuit	baseband circuit	baseband circuit	baseband circuit

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