2SD571-L-AZ datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Discrete semiconductor> The transistor> 2SD571-L-AZ

2SD571-L-AZ: DescriptionSmall Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon; CategoryDiscrete semiconductor The transistor; File Size170KB，3 Pages; ManufacturerNEC Electronics

Download Datasheet Parametric Compare View All

2SD571-L-AZ Overview

Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon

2SD571-L-AZ Parametric

Parameter Name	Attribute value
Maker	NEC Electronics
package instruction	IN-LINE, R-PSIP-T3
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum collector current (IC)	0.7 A
Collector-emitter maximum voltage	50 V
Configuration	SINGLE
Minimum DC current gain (hFE)	135
JESD-30 code	R-PSIP-T3
Number of components	1
Number of terminals	3
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Polarity/channel type	NPN
Certification status	Not Qualified
surface mount	NO
Terminal form	THROUGH-HOLE
Terminal location	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED
transistor applications	AMPLIFIER
Transistor component materials	SILICON
Nominal transition frequency (fT)	110 MHz
Base Number Matches	1

Preview

Download Datasheet

View All

2SD571-L-AZ Related Products

	2SD571-L-AZ	2SD571-M	2SD571-K	2SD571-K-AZ	2SD571-AZ	2SD571-L	2SD571-M-AZ
Description	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon	Small Signal Bipolar Transistor, 0.7A I(C), 50V V(BR)CEO, 1-Element, NPN, Silicon
Maker	NEC Electronics	NEC Electronics	NEC Electronics	NEC Electronics	NEC Electronics	NEC Electronics	NEC Electronics
package instruction	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3	IN-LINE, R-PSIP-T3
Reach Compliance Code	unknown	compliant	compliant	unknown	unknown	compliant	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum collector current (IC)	0.7 A	0.7 A	0.7 A	0.7 A	0.7 A	0.7 A	0.7 A
Collector-emitter maximum voltage	50 V	50 V	50 V	50 V	50 V	50 V	50 V
Configuration	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE
Minimum DC current gain (hFE)	135	90	200	200	50	135	90
JESD-30 code	R-PSIP-T3	R-PSIP-T3	R-PSIP-T3	R-PSIP-T3	R-PSIP-T3	R-PSIP-T3	R-PSIP-T3
Number of components	1	1	1	1	1	1	1
Number of terminals	3	3	3	3	3	3	3
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Polarity/channel type	NPN	NPN	NPN	NPN	NPN	NPN	NPN
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	NO	NO	NO	NO	NO	NO
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal location	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
transistor applications	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER
Transistor component materials	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON
Nominal transition frequency (fT)	110 MHz	110 MHz	110 MHz	110 MHz	110 MHz	110 MHz	110 MHz
Base Number Matches	1	1	1	1	1	1	-

Recommended Resources

High input impedance three op amp differential amplifier circuit diagram

automatic dimmer circuit

Circuit diagram with symmetrical 5V, 12V regulated power supply

SK-6 voice controller circuit.gif

Automatic fill light for song and dance hall

Float charging circuit

How does the accessory detection circuit work (current loop)?: Attached is the circuit diagram, which is part of a brushless DC motor control circuit, mainly to detect the current of the motor coil. I would like to ask experts to help explain the working principl...; ppxxjh Analog electronics

It's all because of the microcontroller - then an interesting and practical microcontroller tutorial book: Everything should start with the running light Author/Xiong Rensheng It should be. Learning single-chip microcomputers should start with the running light. It is estimated that teachers in China and e...; 171915529 51mcu

Applying Qi-compliant wireless power solutions to low-power wearable products: [size=5]Using Qi-Compliant Wireless Power Solutions for Low-Power Wearables[/size][size=4] [/size] [size=4] [/size] [b][size=6]Introduction[/size][/b] [size=4]Many low-power wearable devices such as s...; dontium Analogue and Mixed Signal

In wince, how to remove the system startup explorer and start the application directly.: The Internet says that in shell.reg, modify [HKEY_LOCAL_MACHINE\init] "Launch50"="explorer.exe" "Depend50"=hex:14,00, 1e,00 and change explorer.exe to my application. However, after changing it, the a...; gw1300 Embedded System

Several questions for AM335X beginners: I am a beginner of AM335X, and I am currently using an AM3352 800M chip. The platform is STARTWARE naked running. Now I have a few questions: 1: In the MLO file generated by the BOOT example, what is ...; YuanYuan DSP and ARM Processors

What should I do if there is more than one testbench file when using modelsim simulation in Quartus II?: For example, my testbench consists of three Verilog files: tb_bin_gen.v, tb_bin_monitor.v and tb_bin_counter_top.v, among which tb_bin_counter_top.v is the top-level file of the testbench. In the Sett...; zpccx FPGA/CPLD

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components