530AA1338M00BGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 530AA1338M00BGR

530AA1338M00BGR: DescriptionLVPECL Output Clock Oscillator, 1338MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530AA1338M00BGR Overview

LVPECL Output Clock Oscillator, 1338MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530AA1338M00BGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1338 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

PT2262-IR internal schematic and pin diagram

Simple water level controller circuit (1)

Video switching circuit diagram

Circuit diagram of a 12-bit analog-to-analog converter composed of two 8-bit analog-to-analog converters

Wound rotor asynchronous motor series resistor step-down starting circuit

Telephone schematic diagram 07

Questions about mounting GPIO on the AHB bus: [size=5]Hello everyone, I got the TM4C 123G H6PM board three days ago. Because I want to make a wireless image transmission device, which needs to drive the camera, I need a faster IO conversion speed...; calom1992 Microcontroller MCU

A question about kernel: I have bought the board for almost a month, but I have been stuck on several issues: 1. I don't understand why I need an SD card. I remember uImage is only a few MB. 2. I don't have a screen, and I do...; klyz12ss DSP and ARM Processors

How many of these funny jokes have you seen? Did you like the last one?: [align=left]1. Xiaomei wrote down her wishes for when she grows up in her composition book: 1. I hope to have a lovely child; 2. I also hope to have a husband who loves me. As a result, she found that...; yijindz Talking

[Unmanned driving smart car based on ESP32 road sign identification] Unboxing ESP32-S2-KALUGA-1+K210Sipeed M1 docking station kit: I am honored to be shortlisted for the second round of the EEWORLD community [2022 Digi-Key Innovation Design Competition]. Through this competition, I can combine the YOLOv3 model I have learned with...; eew_V9qu8c DigiKey Technology Zone

Electrostatic Capacitor Variable Capacitor: [p=20, null, left][color=rgb(73, 73, 73)][font=Verdana, sans-serif][size=12px]In recent years, the Near Field Communication (NFC) technology, which uses a frequency of about 13.56MHz, has been gradual...; wstt RF/Wirelessly

Development of network server based on CycloneV: [font=Helvetica, Arial, sans-serif][color=#000000]Thanks[/color][/font][color=#000][font=Helvetica, Arial, sans-serif]EEWORLD and Altera for providing such a great opportunity[/font][/color]...; hytz845 FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components