Unless otherwise specified, operating conditions are as follows: V
in
=5V, V
o
=3.3V, I
o
=6A, T
A
=25°C, C
in
=100µF, C
o
=µF.
Parameter
Input
Input Voltage
Input Current Ripple
Required Capacitance
Output
Output Voltage
Output Program Range
Output Current
Output Ripple
Output Rise Time
Line Regulation
Load Regulation
Temperature Coefficient
Combined Variation
Protection
General
Switching Frequency
Dynamic Response
∆I
O
/
∆
t = 1A/1 0! sec, V
i
= 5.0V, T
A
= 25°C
Load Change from I
O
= 0% to I
O
= 100%
Peak Deviation
Settling time (V
O
<10% Peak Deviation)
Load change from I
O
= 100% to I
O
= 0%
Peak Deviation
Settling time (V
O
<10% Peak Deviation)
Temperature
Operating Temperature
Storage Temperature
800
kHz
T
c
V
in
min-max &/or I
o
min-max
T
A
=25°C- 85°C
-2
+2
%
I
o
min - I
o
max
Tr
0
+0.5
+0.5
0.01
Output Capacitance Range C
o
I
o
V
o
Nominal
3.25
1.8
0
12
5000
3.3
3.35
3.6
6
50
V
DC
V
DC
Amps
mVp-p
µS
µF
%
%
%/°C
C
in
V
in
Conditions
Min
4.5
Typ
5.0
200
100
Max
5.5
Units
V
DC
mA
RMS
µF
Note 1
0
Note 2
T
A
=25°C
20Mhz BW
Note 3
60
150
90
100
mV
µsec
mV
µsec
Note 4
-40
+60
+125
°C
°C
Notes
1. Input source<3” from 6-PAK™, load transient <3A per SIP 100µF low ESR capacitor for load transients >3A per
.
SIP
.
2. Optional programming 1.8 - 3.6 or +10% available. See Table.
3. Short circuit and thermal protection.
4. 100 lfm air, V
o
=3.3V, I
o
=6A. See Thermal Design Guide for other conditions.
Page 2
6-PAK 11/99 REV D
Programming
The 6-PAK™ is programmed through the Control SIP All
.
connected Power Boosters follow the Control SIP
programming. To program the 6-PAK™ for V
out
<3.3,
connect a resistor across the TRIM and V
o
pins. For
V
out
>3.3, resistor is connected across TRIM and GND.
Table 2
V
out
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Thermal Design Guide
Locate your operating current, read the junction temp rise
from the graph and add to your maximum ambient. 135°C
is the maximum allowable operating junction temperature.
Test conditions: Device soldered into 4” X 4: PCB, 2-sided
with power and ground planes for heat conduction. Due to
the difficulty in predicting the thermal effects of airflow
velocity and direction, and thermal conduction through
ground planes, it is important that the 6-PAK™ be evaluated
thermally in each application. For high ambient temperature/
high current application, please request our Application
Note, “Accurate Measurements of 6-PAK™ Junction
Temperature.”
Resistor Value
0Ω
15.6Ω
34Ω
55.6Ω
80.6Ω
110Ω
147Ω
196Ω
255Ω
332Ω
V
out
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
Resistor Value
442Ω
604Ω
866Ω
1.37k
2.80k
Open
2.32k
1.00k
649Ω
T
j
Rise vs. I
o
(Junction Temp Rise vs. Output Current)
Transient Response
Operating conditions are as follows: Vin=5V, Vo=3.3V, Load
change from Io=0% to Io=100%, TA=25°C, Cin=0F, Co=µF.
Temp Rise C°
Output Current - Amps
Efficiency
Efficiency %
Operating conditions are as follows: Vin=5V, Vo=3.3V, Load
change from Io=100% to Io=0%, TA=25°C, Cin=0F, Co=µF.
Output Current - Amps
Ordering Information
Typical examples:
6P
6P
25 -
25 -
C
P
6A Control SIP
6A Power Booster SIP
6-PAK 11/99 REV D
Page 3
Mechanical Outline
TOLERANCES
+.008” for 3 place decimals
+ .02” for 2 place decimals
+ .002” for pin diameter
Pin Out
Pin
1
2
3
4
5
6
7
8
9
Function
V
o
V
o
TRIM
GND
INTI
Gnd
INT2
V
i
V
i
Description
Output Voltage
Output Voltage
Output Adjust*
Ground
InterModule 1
Ground
InterModule 2
5V Input Voltage
5V Input Voltage
System Interconnection Guidelines
1. Each SIP must have input, ground and output pins
sunk into common input ground and output planes in
the host PC board.
2. Two additional common signal traces are required to
interconnect INT1 and INT2 pins. These traces must
be a least 0.06” wide and make a straight connection
among the modules.
3. Power Booster SIP must be adjacent to the Control
SIP located in the center of the layout, as shown in
the Typical Example figure. Recommended distance
between SIP pin centers is 0.5”.
* not connected on Boosters
Standard Options are shown, consult factory for other available options.
The information provided herein is believed to be reliable; however, C&D TECHNOLOGIES assumes no responsibility for inaccuracies or omissions. C&D TECHNOLOGIES assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No
patent rights or licenses to any of the circuits described herein are implied or granted to any third party. C&D TECHNOLOGIES does not authorize or warrant any C&D TECHNOLOGIES
product for use in life support devices/systems or in aircraft control applications.
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