AAA represents Product Code Top Mark - see ordering code
Note:
Orientation of Top Mark determines Pin One location. Read the top product
code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
(Top Through View)
www.fairchildsemi.com
2
NC7WBD3125
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
)
DC Output Voltage (V
IN
) (Note 2)
DC Input Diode Current
(I
IK
) V
IN
0V
DC Output (I
OUT
) Current
DC V
CC
or Ground Current
(I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
Junction Temperature under Bias (T
J
)
Lead Temperature (T
L
)
Power Dissipation (P
D
) @
85
q
C
(Soldering, 10 Seconds)
0.5V to
7.0V
0.5V to
7.0V
0.5V to
7.0V
50 mA
128 mA
Recommended Operating
Conditions
(Note 3)
Supply Operating (V
CC
)
Control Input Voltage (V
IN
)
Switch Input Voltage (V
IN
)
Switch Output Voltage (V
OUT
)
Operating Temperature (T
A
)
Input Rise and Fall Time (t
r
, t
f
)
Control Input
Thermal Resistance (
T
JA
)
Switch I/O
0 ns/V to 5 ns/V
0 ns/V to DC
250
q
C/W
4.5V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
40
q
C to
85
q
C
r
100 mA
65
q
C to
150
q
C
150
q
C
260
q
C
250 mW
Note 1:
The “Absolute Maximum Ratings” are those values beyond which the safety
of the device cannot be guaranteed. The device should not be operated at these lim-
its. The parametric values defined in the Electrical Characteristics tables are not
guaranteed at the absolute maximum ratings. The “Recommended Operating Condi-
tions” table will define the conditions for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if the input
and output diode current ratings are observed.
Note 3:
Unused logic inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
V
OH
I
IN
I
OFF
R
ON
Parameter
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
Input Leakage Current
Power OFF Leakage Current
Switch On Resistance
(Note 4)
I
CC
Quiescent Supply Current
V
CC
(V)
4.5
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
5.5
5.5
4.5
4.5
4.5
5.5
1.1
1.5
10.0
mA
3.0
3.0
15.0
See Figure 3
2.0
0.8
Min
T
A
40
q
C to
85
q
C
Typ
Max
Units
Conditions
I
IN
1.2
V
V
V
V
18 mA
r
1.0
r
1.0
7.0
7.0
50.0
P
A
P
A
:
V
IN
0
d
V
IN
d
5.5V
V
IN
V
IN
V
IN
V
IN
OE
1
OE
1
V
IN
0V, I
IN
0V, I
IN
2.4V, I
IN
OE
2
OE
2
V
CC
0
d
A, B
d
V
CC
64 mA
30 mA
15 mA
0
V
CC
or GND, I
OUT
GND
V
CC
V
CC
'
I
CC
P
A
mA
Increase in I
CC
per Input
(Note 5)
5.5
1.0
2.5
3.4V, One OE Input only,
Other OE
Note 4:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5:
Per TTL driven input (V
IN
3.4V, control input only). A and B pins do not contribute to I
CC
.
3
www.fairchildsemi.com
NC7WBD3125
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
(V)
t
PHL
,
t
PLH
t
PZL
,
t
PZH
t
PLZ
,
t
PHZ
Output Disable Time
4.5 to 5.5
0.8
3.0
4.8
ns
Propagation Delay Bus-to-Bus
(Note 6)
Output Enable Time
4.5 to 5.5
1.0
3.5
5.8
ns
V
I
V
I
V
I
V
I
7V for t
PZL
0V for t
PZH
7V for t
PLZ
0V for t
PHZ
4.5 to 5.5
C
L
Min
40
q
C to
85
q
C,
RD
Typ
50 pF, RU
500
:
Max
0.25
Units
Conditions
Figure
Number
ns
V
I
OPEN
Figures
1, 2
Figures
1, 2
Figures
1Figure 2
Note 6:
This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50 pF load
capacitance, when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis.
Capacitance
Symbol
C
IN
C
I/O
(OFF)
C
I/O
(ON)
Parameter
Control Pin Input Capacitance
Port OFF Capacitance
Port ON Capacitance
Typ
2.5
6.0
12.0
Max
Units
pF
pF
pF
V
CC
V
CC
V
CC
0V
5.0V
OE
0V
Conditions
5.0V, OE
AC Loading and Waveforms
Input driven by 50
:
source terminated in 50
:
C
L
includes load and stray capacitance
Input PRR
1.0 MHz; t
W
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4
NC7WBD3125
DC Electrical Characteristics
FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage
京公网安备 11010802033920号
EEWORLD
