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IDT7204L12PG

Description
FIFO, 4KX9, 12ns, Asynchronous, CMOS, PDIP28, PLASTIC, DIP-28
Categorystorage    storage   
File Size147KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

IDT7204L12PG Overview

FIFO, 4KX9, 12ns, Asynchronous, CMOS, PDIP28, PLASTIC, DIP-28

IDT7204L12PG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeDIP
package instructionDIP,
Contacts28
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time12 ns
Other featuresRETRANSMIT
period time20 ns
JESD-30 codeR-PDIP-T28
JESD-609 codee3
length36.576 mm
memory density36864 bit
memory width9
Number of functions1
Number of terminals28
word count4096 words
character code4000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize4KX9
Output characteristics3-STATE
ExportableNO
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height4.699 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width15.24 mm
Base Number Matches1
CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
Pin and functionally compatible with IDT720X family
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for applications requiring asynchronous and simultaneous
read/writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with the latest revision
of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
-D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
THREE-
STATE
BUFFERS
R
READ
CONTROL
FLAG
LOGIC
DATA OUTPUTS
(Q
0
-Q
8
)
RS
RESET
LOGIC
FL/RT
EF
FF
XI
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
EXPANSION
LOGIC
XO/HF
2661 drw01
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
2002 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
SEPTEMBER 2002
DSC-2661/14
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