531RA885M000DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 531RA885M000DG

531RA885M000DG: DescriptionLVPECL Output Clock Oscillator, 885MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531RA885M000DG Overview

LVPECL Output Clock Oscillator, 885MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531RA885M000DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	885 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Mos tube switch circuit diagram

AC voltage current

Electric kettle automatic power off controller circuit diagram

High Voltage Geiger Counter Power Supply

Lithium battery charge status indicator

555 DC power pulsation monitor

Power management goes beyond the chip level: In an era that is sensitive to power consumption, innovative ultra-low power consumption products have become the common research and development direction of the power supply industry. Therefore, ene...; zbz0529 Power technology

Help: About the application of DSP in voice: My boss recently gave me a project to work on a speech noise reduction algorithm. It's a bit of a headache. Is there anyone who has done this before? Can you share your experience?...; panbo5983 DSP and ARM Processors

A note about 2D hardware acceleration in the PB help document: I am currently developing the 2D hardware acceleration part of the WINCE5.0 display driver. I don't quite understand a description in the PB help document, namely the last few lines of ---Display Driv...; yanhaihaha Embedded System

RTX51 Tiny applet has problems: #include#includeint counter0; int counter1; void job0(void)_task_ 0 { //ET0=1; //TR0=1; //EA=1; os_create_task(1); /* mark task 1 as ready */ while(1) { /* loop forever */ counter0++; /* update the co...; zoujy518 Embedded System

I am a great detective: Finding the lost TI power supply puzzle: [align=center][color=rgb(18, 119, 221)][font=Fangzheng Lanting bold black, Microsoft elegant black][url=https://bbs.eeworld.com.cn/thread-926795-1-1.html]I am a great detective: looking for the lost T...; zyh9366 Analogue and Mixed Signal

What is the development trend of machine vision surface defect detection system?: In China, the production volume of industrial products is increasing every year. Therefore, users have higher and higher requirements for product quality. Here we are not only talking about performanc...; Crush12138 Robotics Development

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components