FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL
CLOCK GENERATOR
ICS843051-57
General Description
The ICS843051-57 is a Gigabit Ethernet Clock
Generator and a member of the HiPerClocks
TM
family
HiPerClockS™
of high performance devices from IDT. The
ICS843051-57 uses a 20MHz crystal to synthesize
160MHz. The ICS843051-57 has excellent phase
jitter performance, over the 12kHz – 20MHz integration range.
The ICS843051-57 is packaged in a small 8-pin TSSOP, making it
ideal for use in systems with limited board space.
Features
•
•
•
•
•
•
•
One differential 3.3V LVPECL output
VCO range: 480MHz – 768MHz
RMS phase jitter at 155.52MHz (12kHz – 20MHz):
0.84ps (typical)
Full 3.3V output supply mode
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Industrial temperature information available upon request
ICS
Table 1. Frequency Table
Inputs
Crystal Frequency (MHz)
20
20
19.53125
19.53125
19.44
19.44
18.75
18.75
FREQ_SEL
0
1
0
1
0
1
0
1
Output Frequency Range
(MHz)
160
80
156.25
78.125
155.52
77.76
150
75
Block Diagram
FREQ_SEL
XTAL_IN
Pin Assignment
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q
nQ
FREQ_SEL
OSC
XTAL_OUT
Phase
Detector
VCO
0 ÷4 (default)
1 ÷8
Q
nQ
÷32
(fixed)
ICS843051-57
8 Lead TSSOP
4.40mm x 3.0mm x 0.925
package body
G Package
Top View
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
1
ICS843051AG-57 REV. AJUNE 19, 2007
ICS843051-57
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
.
Table 2. Pin Descriptions
Number
1
2
3,
4
5
6, 7
8
Name
V
CCA
V
EE
XTAL_OUT
XTAL_IN
FREQ_SEL
nQ, Q
V
CC
Power
Power
Input
Input
Output
Power
Pulldown
Type
Description
Analog supply pin
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Frequency select pin. LVCMOS/LVTTL interface levels.
Differential output pair. LVPECL interface levels.
Core supply pin.
NOTE:
Pulldown
refers to intenal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 3. Pin Characteristics
Symbol
C
IN
Parameter
Input Capacitance
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
k
Ω
R
PULLDOWN
Input Pulldown Resistor
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characterisitcs
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
112.4°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= 3.3V ± 10%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
CC
V
CCA
I
CC
I
CCA
I
EE
Parameter
Power Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Power Supply Current
Test Conditions
Minimum
2.97
V
CC
– 0.09
Typical
3.3
3.3
Maximum
3.63
V
CC
51
9
59
Units
V
V
mA
mA
mA
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
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ICS843051AG-57 REV. A JUNE 19, 2007
ICS843051-57
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Table 4B. LVCMOS/LVTTL DC Characteristics,
V
CC
= 3.3V ± 10%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
CC
= V
IN
= 3.63
V
CC
= 3.63V, V
IN
= 0V
-5
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
150
Units
V
V
µA
µA
Table 4C. LVPECL DC Characteristics,
V
CC
= 3.3V ±10%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-toPeak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.6
Typical
Maximum
V
CC
– 0.9
V
CC
– 1.7
1.0
Units
µA
µA
V
NOTE 1: Outputs termination with 50Ω to V
CC
– 2V.
AC Electrical Characteristics
Table 5. AC Characteristics,
V
CC
= 3.3V ± 10%, V
EE
= 0V, T
A
= 0°C to 70°
Parameter Symbol
f
OUT
Output Frequency
Test Conditions
FREQ_SEL = 0
FREQ_SEL = 1
155.52MHz,
Integration Range: 12kHz – 20MHz
tjit(Ø)
RMS Phase Jitter, Random;
NOTE 1
156.25MHz,
Integration Range: 12kHz – 20MHz
160MHz,
Integration Range: 12kHz – 20MHz
t
R
/ t
F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
47
Minimum
150
75
0.84
0.89
0.88
550
53
Typical Maximum
160
80
Units
MHz
MHz
ps
ps
ps
ps
%
NOTE 1: Please refer to Phase Noise Plot.
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
3
ICS843051AG-57 REV. A JUNE 19, 2007
ICS843051-57
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Typical Phase Noise at 155.52MHz
➝
Gigabit Ethernet Filter
Noise Power
dBc
Hz
155.52MHz
RMS Phase Jitter (Random)
12kHz to 20MHz = 0.84ps (typical)
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
➝
➝
Raw Phase Noise Data
Phase Noise Result by adding a
Gigabit Ethernet filter to raw data
Offset Frequency (Hz)
4
ICS843051AG-57 REV. A JUNE 19, 2007
ICS843051-57
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Parameter Measurement Information
2V
2V
Noise Power
Phase Noise Plot
V
CC
V
CCA
Qx
SCOPE
Phase Noise Mask
LVPECL
nQx
V
EE
f
1
Offset Frequency
f
2
RMS Jitter = Area Under the Masked Phase Noise Plot
-1.3V±0.33V
-
-
3.3V LVPECL Output Load AC Test Circuit
RMS Phase Jitter
nQ
Q
t
PW
t
PERIOD
80%
Clock
Outputs
x 100%
80%
V
SW I N G
20%
t
R
t
F
20%
odc =
t
PW
t
PERIOD
Output Duty Cycle/Pulse Width/Period
Output Rise/Fall Time
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
5
ICS843051AG-57 REV. A JUNE 19, 2007
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