73S8010C-IM/F datasheet, PDF - EEWORLD Datasheet

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73S8010C-IM/F: DescriptionAnalog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32; CategoryAnalog mixed-signal IC The signal circuit; File Size357KB，27 Pages; ManufacturerTeridian Semiconductor Corporation; Websitehttp://www.teridian.com/; Environmental Compliance

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73S8010C-IM/F Overview

Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32

73S8010C-IM/F Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Teridian Semiconductor Corporation
package instruction	5 X 5 MM, LEAD FREE, QFN-32
Reach Compliance Code	unknown
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT
JESD-30 code	S-XQCC-N32
length	5 mm
Number of functions	1
Number of terminals	32
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Certification status	Not Qualified
Maximum seat height	0.9 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	5 mm
Base Number Matches	1

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73S8010C

Smart Card Interface

Simplifying System Integration™

DATA SHEET

April 2009

DESCRIPTION

The Teridian 73S8010C is a single smart card

interface IC. It provides full electrical compliance

with ISO-7816-3 and EMV 4.0 specifications.

Interfacing with the host is done through the two-wire

I2C bus. Data exchange with the card is managed

from the system controller using the I/O line (and

eventually the auxiliary I/O lines).

An on-chip oscillator using an external crystal, or

connection to a clock signal coming from the

system controller can generate the card clock

signal.

The 73S8010C IC incorporates an ISO-7816-3

activation/deactivation sequencer that controls the

card signals. Level shifters drive the card signals

with the selected card voltage (3 V or 5 V), coming

from an internal DC-DC converter.

With its high-efficiency DC-DC converter, the

Teridian 73S8010C is a cost-effective solution for

any smart card reader application to be powered

from a single 2.7 V to 3.6 V power supply.

Hardware support for auxiliary I/O lines, C4 / C8

contacts, is provided.

Emergency card deactivation is initiated upon card

extraction or upon any fault generated by the

protection circuitry. The fault can be a VDD (digital

power supply), a VCC (card power supply), a card

over-current, or an over-heating fault.

ADVANTAGES



Single smart card interface

The inductor-based DC-DC converter provides

higher current and efficiency than the usual

charge-pump capacitor-based converters



Ideal for battery-powered applications



Suitable for high current cards and

SAMs: (100 mA max)

Power down mode: 2

A

typical

Small Format (5x5mm) 32-QFN package option

FEATURES



Card Interface:



Complies with ISO-7816-3 and EMV 4.0



A DC-DC Converter provides 3V / 5V to the

card from an external power supply input



High-efficiency converter: > 80% @ V

= 3.3 V,

= 5 V and I

= 65 mA



Up to 100 mA supplied to the card



ISO-7816-3 Activation / Deactivation sequencer

with emergency automated deactivation on

card removal or fault detected by the protection

circuitry



Protection include 2 voltage supervisors that

detect voltage drops on card V

and V

power supplies



The V

voltage supervisor threshold value

can be externally adjusted



True over-current detection (150 mA max.)



1 card detection input



Auxiliary I/O lines, for C4 / C8 contact signals

Host Interface:



Fast mode, 400 kbps I

C slave bus



8 possible devices in parallel



One control register and one status register



Interrupt output to the host for fault

detection



Crystal oscillator or host clock, up to 27 MHz

Power Supply:



: 2.7 V to 3.6 V

6 kV ESD Protection on the card interface

Package: SO28 or 32QFN



APPLICATIONS



Set-Top-Boxes, DVD / HDD Recorders:

Conditional Access and Pay-per-View slots

Point of Sales and Transaction Terminals

EMV slots in cell phones and PDAs



Rev. 1.5

DS_8010C_024

73S8010C Data Sheet

Table of Contents

Pin Description .................................................................................................................................... 5

1.1

Card Interface ............................................................................................................................... 5

1.2

Miscellaneous Inputs and Outputs................................................................................................ 5

1.3

Power Supply and Ground............................................................................................................ 5

1.4

Microcontroller Interface ............................................................................................................... 6

Host Interface (I

C Bus) ...................................................................................................................... 7

2.1

Host Interface Control ................................................................................................................... 7

2.2

Host Interface Status .................................................................................................................... 8

2.3

C-bus Timing .............................................................................................................................. 9

Oscillator............................................................................................................................................ 10

DC-DC Converter – Card Power Supply ......................................................................................... 10

Voltage Supervision ......................................................................................................................... 11

Power Down....................................................................................................................................... 11

Over-temperature Monitor................................................................................................................ 12

Activation Sequence ......................................................................................................................... 12

Deactivation Sequence..................................................................................................................... 13

Interrupt ............................................................................................................................................. 13

Warm Reset ....................................................................................................................................... 14

I/O Timing........................................................................................................................................... 14

Typical Application Schematic ........................................................................................................ 15

Electrical Specification..................................................................................................................... 16

14.1

Absolute Maximum Ratings ........................................................................................................ 16

14.2

Recommended Operating Conditions......................................................................................... 16

14.3

DC Characteristics: Card Interface ............................................................................................. 17

14.4

DC Characteristics: Digital Signals ............................................................................................. 20

14.5

DC Characteristics: Supply ......................................................................................................... 20

14.6

DC Characteristics: I

C Interface ................................................................................................ 21

14.7

Voltage / Temperature Fault Detection Circuits.......................................................................... 21

Mechanical Drawings ....................................................................................................................... 22

15.1

32-pin QFN ................................................................................................................................. 22

15.2

28-pin SO .................................................................................................................................... 23

Package Pin Designation ................................................................................................................. 24

16.1

32-pin QFN ................................................................................................................................. 24

16.2

28-pin SO .................................................................................................................................... 25

Ordering Information ........................................................................................................................ 26

Related Documentation .................................................................................................................... 26

Contact Information .......................................................................................................................... 26

Revision History ........................................................................................................................................ 27

Rev. 1.5

73S8010C Data Sheet

DS_8010C_024

Figures

Figure 1: 73S8010C Block Diagram ............................................................................................................. 2

Figure 2: I

C Bus Write Protocol ................................................................................................................... 8

Figure 3: I

C Bus Read Protocol ................................................................................................................... 9

Figure 4: I

C Bus Timing Diagram ................................................................................................................ 9

Figure 5: Power Down Mode Operation...................................................................................................... 12

Figure 6: Activation Sequence .................................................................................................................... 12

Figure 7: Deactivation Sequence ................................................................................................................ 13

Figure 8: FAULT Functions,

INT

operation ................................................................................................. 13

Figure 9: Warm Reset operation ................................................................................................................. 14

Figure 10: I/O Timing .................................................................................................................................. 14

Figure 11: 73S8010C – Typical Application Schematic .............................................................................. 15

Figure 12: DC – DC Converter Efficiency (V

= 5 V) ................................................................................ 18

Figure 13: DC – DC Converter Efficiency (V

= 3 V) ................................................................................ 18

Figure 14: 32-pin QFN Package Drawing ................................................................................................... 22

Figure 15: 28-pin SO Package Drawing ..................................................................................................... 23

Tables

Table 1: Device Address Selections ............................................................................................................. 7

Table 2: Host Control Register ...................................................................................................................... 7

Table 3: Host Status Register ....................................................................................................................... 8

Table 4: Choice of Vcc Capacitor ............................................................................................................... 10

Rev. 1.5

73S8010C-IM/F Related Products

	73S8010C-IM/F	73S8010C-IL/F	73S8010C-ILR/F	73S8010C-IMR/F
Description	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32	Analog Circuit, 1 Func, PDSO28, LEAD FREE, SOP-28	Analog Circuit, 1 Func, PDSO28, LEAD FREE, SOP-28	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	Teridian Semiconductor Corporation	Teridian Semiconductor Corporation	Teridian Semiconductor Corporation	Teridian Semiconductor Corporation
package instruction	5 X 5 MM, LEAD FREE, QFN-32	LEAD FREE, SOP-28	LEAD FREE, SOP-28	5 X 5 MM, LEAD FREE, QFN-32
Reach Compliance Code	unknown	unknown	unknown	unknown
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT	ANALOG CIRCUIT	ANALOG CIRCUIT	ANALOG CIRCUIT
JESD-30 code	S-XQCC-N32	R-PDSO-G28	R-PDSO-G28	S-XQCC-N32
length	5 mm	17.9 mm	17.9 mm	5 mm
Number of functions	1	1	1	1
Number of terminals	32	28	28	32
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	UNSPECIFIED	PLASTIC/EPOXY	PLASTIC/EPOXY	UNSPECIFIED
encapsulated code	HVQCCN	SOP	SOP	HVQCCN
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.9 mm	2.79 mm	2.79 mm	0.9 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V
surface mount	YES	YES	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	GULL WING	GULL WING	NO LEAD
Terminal pitch	0.5 mm	1.27 mm	1.27 mm	0.5 mm
Terminal location	QUAD	DUAL	DUAL	QUAD
width	5 mm	7.49 mm	7.49 mm	5 mm
Base Number Matches	1	1	1	1

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