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XRK79892

Description
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
File Size188KB,10 Pages
ManufacturerExar [Exar Corporation]
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XRK79892 Overview

INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

xr
JANAUARY 2005
PRELIMINARY
XRK79892
REV. P1.0.1
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
phase/frequency alignment will occur with minimal
output phase disturbance. The typical phase bump
caused by a failed clock is eliminated.
FEATURES
GENERAL DESCRIPTION
The XRK79892 is a PLL clock driver designed
specifically for redundant clock tree designs. The
device receives two differential LVPECL clock signals
from which it generates 5 new differential LVPECL
clock outputs. Two of the output pairs regenerate the
input signals frequency and phase while the other
three pairs generate 4x, phase aligned clock outputs.
External PLL feedback is used to also provide zero
delay buffer performance.
The XRK79892 Intelligent Dynamic Clock Switch
circuit continuously monitors both input CLK signals.
Upon detection of a failure (CLK stuck HIGH or LOW
for at least 1 period), the INP_BAD for that CLK will
be latched (H). If that CLK is the primary clock, the
device will switch to the good secondary clock and
F
IGURE
1. B
LOCK
D
IAGRAM OF THE
XRK79892
Fully Integrated PLL
Intelligent Dynamic Clock Switch
LVPECL Clock Outputs
LVCMOS Control I/O
3.3V Operation
32-Lead LQFP Packagin
Pin compatible with MPC9892i
CLK_Selected
INP1Bad
INP0Bad
Man_Override
Alarm_Reset
Sel_CLK
Dynamic
Switch
Logic
PLL_En
Qb0
Qb0
Qb1
Qb1
÷4
Qb2
Qb2
Qa0
Qa0
Qa1
Qa1
OR
CLK0
CLK0
CLK1
CLK1
Ext_FB
Ext_FB
MR
PLL
800-1600MHz
÷16
PRODUCT ORDERING INFORMATION
P
RODUCT
N
UMBER
XRK79892IQ
P
ACKAGE
T
YPE
32-Lead LQFP
O
PERATING
T
EMPERATURE
R
ANGE
-40°C to +85°C
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com

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Description INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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