RF2175
0
Typical Applications
• 3V TETRA Cellular Handsets
• 3V CDMA Cellular Handsets
• Portable Battery-Powered Equipment
3V 400MHz LINEAR AMPLIFIER
Product Description
The RF2175 is a high-power, high-efficiency linear ampli-
fier IC targeting 3V handheld systems. The device is
manufactured on an advanced Gallium Arsenide Hetero-
junction Bipolar Transistor (HBT) process, and has been
designed for use as the final RF amplifier in TETRA hand-
held digital cellular equipment, spread-spectrum systems,
and other applications in the 380MHz to 512MHz band.
The RF2175 has an analog bias control voltage to maxi-
mize efficiency. The device is self-contained with 50Ω
input, and the output can be easily matched to obtain
optimum power, efficiency, and linearity characteristics.
The package is a small SSOP-16 plastic with backside
ground.
-A-
0.154
0.012
0.008
0.004
0.002 Note 3
EXPOSED HEATSINK
Exposed Heat
Sink
0.196
0.189
0.025
0.123
0.107
0.237
0.063
0.057
0.087
0.071
8° MAX
0° MIN
NOTES:
1. Shaded lead in Pin 1.
2. Lead coplanarity - 0.003 with respect to datum "A".
3. Lead standoff is specified from the lowest point on the
package underside.
0.035
0.016
0.010
0.007
Optimum Technology Matching® Applied
Si BJT
Si Bi-CMOS
InGaP/HBT
GaAs HBT
SiGe HBT
GaN HEMT
GaAs MESFET
Si CMOS
SiGe Bi-CMOS
Package Style: SSOP-16 Slug
Features
• Single 3V Supply
• 31.8dBm Linear Output Power
• 37.5dB Linear Gain
• 30% Linear Efficiency
• On-Board Power Down Mode
• 380MHz to 512MHz Operation
VCC
LTUNE
NC
Q1C
GND1
RF IN
1
2
3
4
5
6
7
Bias
16
15
14
13
12
11
10
9
VBIAS
RF OUT
RF OUT
RF OUT
Ordering Information
RF2175
RF2175 PCBA
3V 400MHz Linear Amplifier
Fully Assembled Evaluation Board
VREG
8
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A8 030313
2-287
RF2175
Absolute Maximum Ratings
Parameter
Supply Voltage (RF Off)
Supply Voltage (RF Applied)
Mode Voltage (V
BIAS
)
Control Voltage (V
REG
)
Input RF Power (Avg.)
Output VSWR - Inband
Output VSWR - Out of Band
Operating Ambient Temperature
Storage Temperature
Moisture Sensitivity
Rating
+8.0
+4.5
+5.0
+5.0
+5
6:1
20:1
-30 to +100
-40 to +120
JEDEC Level 5 *
Unit
V
DC
V
DC
V
DC
V
DC
dBm
Caution!
ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
°C
°C
Parameter
Overall
Usable Frequency Range
Typical Frequency Range
Linear Gain
Harmonic
P3dB Output Power
Linear Output Power
(TETRA Modulation)
Total Linear Efficiency
Adjacent Channel Power Rejec-
tion
Specification
Min.
Typ.
Max.
Unit
Condition
T=25°C, V
CC
=3.6V, Freq=410MHz to
420MHz unless otherwise specified, 25%
duty cycle. P
OUT
=31.8dBm
380
34.5
34
31.8
25
-35
-45
30
410 to 420
37.5
512
41.5
-30
MHz
MHz
dB
dBc
dBm
dBm
%
dBc
dBc
ACPR@25kHz, TETRA modulation
ACPR@50kHz, TETRA modulation
Power Supply
Power Supply Voltage
Idle Current
V
CC
Current
V
REG
Current
V
BIAS
Current
Turn On/Off Time
3.0
3.6
230
4.5
450
1650
13
3
<150
V
mA
mA
mA
mA
μs
All V
CC
pins, no RF input.
All V
CC
pins, P
OUT
=31.8dBm
Pin 8
Pin 16
Time for power to rise to 95% of its final
value. Measured with 4.7μF and 2.2μF
capacitors on both V
REG
and V
BIAS
lines.
V
REG
=Low
Total Current (Power Down)
10
μA
0
0.2
V
V
REG
“Low” Voltage
2.7
2.8
2.9
V
V
REG
“High” Voltage
2.8
2.9
V
V
BIAS
Control Voltage Range
* The RF2175 is considered JEDEC Level 5 for moisture sensitivity with a maximum peak reflow temperature of 220°C. To assure reli-
able performance, this part must be handled in accordance with JEDEC specifications for a Level 5 part.
2-288
Rev A8 030313
RF2175
Pin
1
2
3
4
5
6
7
8
Function
VCC
L TUNE
NC
Q1C
GND1
RF IN
NC
VREG
Description
Power supply for input bias circuitry. A 1nF high frequency bypass
capacitor is recommended.
Interstage Tuning. A shunt inductor to GND is required to optimize the
match.
No connection.
Power supply for stage 1. V
CC
should be fed through a 25nH or greater
inductor with a decoupling capacitor on the V
CC
side.
Ground for stage 1. For best performance, keep traces physically short
and connect immediately to ground plane. This ground should be iso-
lated from the backside ground contact.
RF input. An external DC blocking capacitor is required if this port is
connected to a DC path to ground or a DC voltage.
No connection.
Power Down control. When this pin is “low”, all circuits are shut off.
When this pin is 2.8V, all circuits are operating normally. V
PD
requires a
regulated 2.8V for the amplifier to operate properly over all specified
temperature and voltage ranges. A dropping resistor from a higher reg-
ulated voltage may be used to provide the required 2.8V. A 100pF high
frequency bypass capacitor is recommended.
No connection.
No connection.
No connection.
RF output and power supply for the output stage. The bias for the out-
put stage is provided through this pin and pin 13. An external matching
network is required to provide the optimum load impedance; see the
application schematics for details.
Same as pin 12.
Harmonic trap. This pin connects to the RF output but is used for pro-
viding a low impedance to the second harmonic of the operating fre-
quency. An inductor or transmission line resonating with a shunt
capacitor at 2f
0
is connected to this pin.
No connection.
The bias pin allows higher efficiency in low power power modes. When
operating at full output, VBIAS should be 2.8V.
Ground connection. The backside of the package should be soldered to
a top side ground pad, which is connected to the ground plane with
multiple vias. The pad should have a short thermal path to the ground
plane.
Interface Schematic
9
10
11
12
NC
NC
NC
RF OUT
13
14
RF OUT
RF OUT
15
16
Pkg
Base
NC
VBIAS
GND
Rev A8 030313
2-289
RF2175
Application Schematic
380MHz
VCC = 3.0 V to 5.2 V
V
CC
0
Ω
2.2 uF
1 nF
1
56 nH
5.1 nH
3
4
5
RF IN: TETRA Modulation
33 nH
VMODE
100 pF
16
Bias
15
5.6 nH
14
3.6 nH
13
12
11
10
9
12.55 nH
56 pF
12 pF
V
CC
1 nF
RF OUT
5.6 pF
2.2 uF
4.7
μF
2
1 nF
6
7
33 nH
RF IN
100 pF
VREG
4.7 pF
2.2 uF
100 pF
8
VREG (VACP) = 2.6 V on, 0 V off
25% duty cycle, 14.17 ms pulse width
2-290
Rev A8 030313
RF2175
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
L2
33 nH
VCC
R1
0
Ω
C2
2.2 uF
C3
1 nF
1
L4
56 nH
2
L5
4.7 nH
3
4
C6
1 nF
5
6
7
8
C16
4.7 pF
C5
2.2 uF
C8
100 pF
2175400A
VMODE
C15
100 pF
16
Bias
15
14
13
12
11
10
9
L6
12.55 nH
VCC
L3
33 nH
C4
100 pF
C9
56 pF
C10
12 pF
C13
5.1 pF
L1
3.6 nH
C11
1 nF
50
Ω μstrip
C14
2.2 uF
C17
4.7
μF
L7
5.6 nH
J2
RF OUT
J1
RF IN
50
Ω μstrip
VREG
P1
P1-1
1
2
P1-3
3
CON3
VCC
GND
VREG
P2-3
P2-1
P2
1
2
3
CON3
VCC
GND
VMODE
Rev A8 030313
2-291
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