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8545AG-02T

Description
Low Skew Clock Driver, 8545 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
Categorylogic    logic   
File Size686KB,13 Pages
ManufacturerIDT (Integrated Device Technology)
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8545AG-02T Overview

Low Skew Clock Driver, 8545 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20

8545AG-02T Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP20,.25
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
series8545
Input adjustmentMUX
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Prop。Delay @ Nom-Sup1.45 ns
propagation delay (tpd)1.45 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.06 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
Base Number Matches1
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS
FANOUT BUFFER
ICS8545-02
Description
The ICS8545-02 is a low skew, high performance
1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout
HiPerClockS™
Buffer and a member of the HiPerClockS™ family of
High Performance Clock Solutions from IDT.
Utilizing Low Voltage Differential Signaling (LVDS)
the ICS8545-02 provides a low power, low noise, solution for
distributing clock signals over controlled impedances of 100Ω. The
ICS8545-02 accepts an LVCMOS/LVTTL input level and translates
it to 3.3V LVDS output levels.
Features
Four differential LVDS output pairs
Two LVCMOS/LVTTL clock inputs to support redundant
or selectable frequency fanout applications
Maximum output frequency: 350MHz
Translates LVCMOS/LVTTL input signals to LVDS levels
Output skew: 60ps (maximum)
Part-to-part skew: 450ps (maximum)
Propagation delay: 1.45ns (maximum)
Additive phase jitter, RMS: 0.14ps (typical)
Full 3.3Vsupply mode
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
Guaranteed output and part-to-part skew characteristics make the
ICS8545-02 ideal for those applications demanding well defined
performance and repeatability.
Block Diagram
CLK_EN
Pullup
nD
Q
LE
CLK1
Pulldown
CLK2
Pulldown
CLK_SEL
Pulldown
0
0
1
1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
OE
Pullup
Pin Assignment
GND
CLK_EN
CLK_SEL
CLK1
nc
CLK2
nc
OE
GND
V
DD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
DD
Q1
nQ1
Q2
nQ2
GND
Q3
nQ3
ICS8545-02
20-Lead TSSOP
6.5mm x 4.4mm x 0.925
mm
package body
G Package
Top View
IDT™ / ICS™
LVDS FANOUT BUFFER
1
ICS8545AG-02 REV. A
March 3,
2009

8545AG-02T Related Products

8545AG-02T 8545AG-02
Description Low Skew Clock Driver, 8545 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20 Low Skew Clock Driver, 8545 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP TSSOP
package instruction TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25
Contacts 20 20
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
series 8545 8545
Input adjustment MUX MUX
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0
length 6.5 mm 6.5 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 20 20
Actual output times 4 4
Maximum operating temperature 70 °C 70 °C
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Encapsulate equivalent code TSSOP20,.25 TSSOP20,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 1.45 ns 1.45 ns
propagation delay (tpd) 1.45 ns 1.45 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.06 ns 0.06 ns
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 4.4 mm 4.4 mm
Base Number Matches 1 1
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