530WA486M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 530WA486M000DGR

530WA486M000DGR: DescriptionCMOS/TTL Output Clock Oscillator, 486MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530WA486M000DGR Overview

CMOS/TTL Output Clock Oscillator, 486MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530WA486M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	486 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

TA8200AH power amplifier circuit drawing schematic diagram

The power factor meter (380V, 5A) is connected through the current transformer

frequency modulation generator circuit

T4163A single column coordinate boring machine electrical schematic circuit (2)

555 thyristor zero-crossing trigger circuit

Electronic volume control circuit

Both solutions for Topic E in 2007 won first prize (with pictures): [i=s]This post was last edited by paulhyde on 2014-9-15 04:00[/i]Design of Switching Voltage Regulator...; wllyj Electronics Design Contest

What should I use to replace the broken sym3107 on at5011?: What should I use to replace the broken sym3107 on at5011?...; ssawee Integrated technical exchanges

if boy. has a house; return girl. marry boy): Dear all: result love(boy, girl) {- if ( boy. 有房() and boy. 有车() {- boy.set(nothing); return girl. 嫁(boy); } if ( girl. 有房() {- while( ! (boy. 赚钱＞ 100,000 and girl. 感情＞ 8 {- for ( day=1; day ＜=365; da...; gina Talking

I don't know what's wrong with the C program of ADC0809. Can you guys give me some advice?: void main(void) { unsigned char xdata* data dptr; unsigned char i,VOUT=0; float Y,Y1,Y2,X; while(1) { dptr=0x7ff8; //address of 0809 (according to the traditional connection method) *dptr=0x00; //star...; beck17 Embedded System

About function calls: I derived a new class DlgMenu from the CDialog class and defined a variable Dlg1 of type DlgMenu. I wrote a function: void Fun(CDialog myDlg) When I call this function like this: Fun(Dlg1), why doesn'...; wolv Embedded System

Transistor function: [size=4]The main function of the transistor is current amplification. Take the common emitter connection as an example (the signal is input from the base, output from the collector, and the emitter is...; 灞波儿奔 Analogue and Mixed Signal

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components