HCPL-7721#560 datasheet, PDF - EEWORLD Datasheet

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HCPL-7721#560: DescriptionLOGIC OUTPUT OPTOCOUPLER; CategoryLED optoelectronic/LED photoelectric; File Size243KB，18 Pages; ManufacturerAVAGO; Websitehttp://www.avagotech.com/

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HCPL-7721#560 Overview

LOGIC OUTPUT OPTOCOUPLER

HCPL-7721#560 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AVAGO
Reach Compliance Code	compliant
Factory Lead Time	26 weeks
Maximum insulation voltage	3750 V
Installation features	SURFACE MOUNT
Number of components	1
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Optoelectronic device types	LOGIC IC OUTPUT OPTOCOUPLER
Nominal response time	4e-8 ns
Nominal supply voltage	5.5 V
surface mount	YES
Base Number Matches	1

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HCPL-0720, HCPL-7720, HCPL-0721 and HCPL-7721

40 ns Propagation Delay, CMOS Optocoupler

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

Available in either an 8-pin DIP or SO-8 package style

respectively, the HCPL-772X or HCPL-072X optocouplers

utilize the latest CMOS IC technology to achieve out-

standing performance with very low power consump-

tion. The HCPL-772X/072X require only two bypass ca-

pacitors for complete CMOS compatability.

Basic building blocks of the HCPL-772X/072X are a CMOS

LED driver IC, a high speed LED and a CMOS detector

IC. A CMOS logic input signal controls the LED driver IC

which supplies current to the LED. The detector IC incor-

porates an integrated photodiode, a high-speed tran-

simpedance amplifier, and a voltage comparator with an

output driver.

Features

•

+5 V CMOS compatibility

•

20 ns maximum prop. delay skew

•

High speed: 25 MBd

•

40 ns max. prop. delay

•

10 kV/µs minimum common mode rejection

•

–40 to 85°C temperature range

•

Safety and regulatory approvals

UL recognized

– 3750 V

rms

for 1 min. per UL 1577

– 5000 V

rms

for 1 min. per UL 1577

(for HCPL-772X option 020)

CSA component acceptance notice #5

IEC/EN/DIN EN 60747-5-5

– V

IORM

= 630 V

peak

for HCPL-772X option 060

– V

IORM

= 567 V

peak

for HCPL-072X option 060

Functional Diagram

**V

DD1

DD2

NC*

TRUTH TABLE

(POSITIVE LOGIC)

, INPUT

LED1

•

fieldbus

OFF

Digital

bus, SDS

Applications

V , OUTPUT

isolation: CC-Link, DeviceNet, Profi-

GND

SHIELD

GND

•

AC plasma display panel level shifting

•

Multiplexed data transmission

•

Computer peripheral interface

•

Microprocessor system interface

Pin 3 is the anode of the internal LED and must be left unconnected

for guaranteed data sheet performance. Pin 7 is not connected

internally.

** A 0.1

µF

bypass capacitor must be connected between pins 1 and

4, and 5 and 8.

TRUTH TABLE

POSITIVE LOGIC

LED1

OFF

OUTPUT

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

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