PRELIMINARY TECHNICAL DATA
a
MicroConverter, Dual 16-Bit ADCs
with Embedded 62kB FLASH MCU
Preliminary Technical Data
FEATURES
High Resolution Sigma-Delta ADCs
Two Independent ADCs (16-Bit Resolution)
16-Bit No Missing Codes
16-Bit rms (16 Bit p-p) Effective Resolution @ 20 Hz
Offset Drift 10 nV/°C, Gain Drift 0.5 ppm/°C
Memory
62 Kbytes On-Chip Flash/EE Program Memory
4 Kbytes On-Chip Flash/EE Data Memory
Flash/EE, 100 Year Retention, 100 Kcycles Endurance
3 Levels of Flash/EE Program Memory Security
In-Circuit Serial Download (No External Hardware)
High Speed User Download (5 Seconds)
2304 Bytes On-Chip Data RAM
8051-Based Core
8051 Compatible Instruction Set
High Performance Single Cycle Core
32 kHz External Crystal
On-Chip Programmable PLL (12.58 MHz Max)
3
×
16-Bit Timer/Counter
26 Programmable I/O Lines
11 Interrupt Sources, Two Priority Levels
Dual Data Pointer, Extended 11-Bit Stack Pointer
On-Chip Peripherals
Internal Power on Reset Circuit
12-Bit Voltage Output DAC
Dual 16-Bit S-D DACs/PWMs
On-Chip Temperature Sensor
Dual Excitation Current Sources
Time Interval Counter (Wakeup/RTC Timer)
UART, SPI®, and I2C® Serial I/O
High Speed Baud Rate Generator (incl 115,200)
Watchdog Timer (WDT)
Power Supply Monitor (PSM)
Power
Normal: 2.3mA Max @ 3.6 V (Core CLK = 1.57 MHz)
Power-Down: 20µA Max with Wakeup Timer Running
Specified for 3 V and 5 V Operation
Package and Temperature Range
52-Lead MQFP (14 mm
×
14 mm), –40°C to +125°C
56-Lead CSP (8 mm
×
8 mm), –40°C to +85°C
APPLICATIONS
Intelligent Sensors
WeighScales
Portable Instrumentation, Battery Powered Systems
4-20mA Transmitters
Data Logging
Precision System Monitoring
ADuC846
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The ADuC846 is a complete smart transducer front end, integrating
two high resolution sigma-delta ADCs, an 8-bit MCU, and
program/data Flash/EE memory on a single chip.
The two independent ADCs (primary and auxiliary) include a
temperature sensor and a PGA (allowing direct measurement of low
level signals). The ADCs with on-chip digital filtering and
programmable output data rates are intended for the measurement of
wide dynamic range, low frequency signals, such as those in weigh
scale, strain-gage, pressure transducer, or temperature measurement
applications.
The device operates from a 32 kHz crystal with an on-chip PLL
generating a high frequency clock of 12.58 MHz. This clock is routed
through a programmable clock divider from which the MCU core
clock operating frequency is generated. The microcontroller core is an
optimized single cycle 8052 offering up to 12.58MIPs performance
while maintaining the 8051 instruction set compatibility.
62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of
nonvolatile Flash/EE data memory, and 2304 bytes of data RAM are
provided on-chip. The program memory can be configured as data
memory to give up to 60 Kbytes of NV data memory in data logging
applications.
On-chip factory firmware supports in-circuit serial download and
debug modes (via UART), as well as single-pin emulation mode via
the EA pin. The ADuC846 is supported by a QuickStart™
development system featuring low cost software and hardware
development tools.
REV. PrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
No license is granted by implication or otherwise under any patent or patent rights
of Analog Devices. Trademarks and registered trademarks are the property of
their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
PRELIMINARY TECHNICAL DATA
SPECIFICATIONS
PARAMETER
PRIMARY ADC
Conversion Rate
No Missing Codes
2
Resolution
Output Noise
Integral Non Linearity
Offset Error
3
Offset Error Drift (vs. Temp)
Full-Scale Error
4
Gain Error Drift
5
(vs. Temp)
ADC Range Matching
Power Supply Rejection
Common Mode DC Rejection
On AIN
On AIN
Common Mode 50/60Hz Rejection
On AIN
On AIN
Normal Mode 50/60 Hz Rejection
On AIN
PRIMARY ADC ANALOG INPUTS
Differential Input Voltage Ranges
9,10
Bipolar Mode (ADC0CON.5 = 0)
Unipolar Mode (ADC0CON.5 = 1)
Analog Input Current
2
Analog Input Current Drift
Absolute AIN Voltage Limits
2
EXTERNAL REFERENCE INPUTS
REFIN(+) to REFIN(–) Range
2
Average Reference Input Current
Average Reference Input Current Drift
‘NO Ext. REF’ Trigger Voltage
Common Mode DC Rejection
Common Mode 50/60Hz Rejection
Normal Mode 50/60 Hz Rejection
0
MIN
5.35
16
1
(AVDD = 2.7 V to 3.6 V or 4.75 V to 5.25 V, DVDD = 2.7 V to 3.6 V or 4.75 V to 5.25 V, REFIN(+)
= 2.5 V, REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal; all
specifications T
MIN
, to T
MAX
unless otherwise noted.).
TYP
19.79
MAX
105
UNITS
Hz
Bits
Bits Pk-Pk
Bits Pk-Pk
ppm of FSR
µV
nV/°C
µV
ppm/°C
µV
dBs
dBs
dBs
dBs
dBs
dBs
dBs
CONDITION
On Both Channels
19.79Hz Update Rate
Range = ± 20mV, 20Hz Update Rate
Range = ± 2.56V, 20Hz Update Rate
Output Noise varies with selected Update Rates
and Gain Range
1 LSB
16
13.5
16
See Tables X and XI in
ADuC836 Datasheet
± 15
±3
± 10
± 10
± 0.5
±2
80
113
95
113
95
90
60
AIN=18mV
AIN=1V, Range=± 2.56V
AIN=7.8mV, Range=± 20mV
@DC, AIN=7.8mV, Range=± 20mV
@DC, AIN=1V, Range=± 2.56V
20 Hz Update Rate
50/60Hz ± 1Hz, AIN=7.8mV, Range=± 20mV
50/60Hz ± 1Hz, AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, 20 Hz Update Rate
± 1.024 x V
REF
/GAIN
1.024 x REFIN/GAIN
±1
±5
±5
± 15
A
GND
+ 0.1
1
0.3
125
90
60
AV
DD
– 0.1
AV
DD
0.65
V
V
nA
nA
pA/°C
pA/°C
V
V
µA/V
nA/V/°C
V
dBs
dBs
dBs
V
REF
= REFIN(+) - REFIN(-) (or Int 1.25V Ref)
GAIN = 1 to 128
V
REF
= REFIN(+) - REFIN(-)
GAIN=1 to 128
T
MAX
= 85°C
T
MAX
= 125°C
T
MAX
= 85°C
T
MAX
= 125°C
2.5
+/- 1
+/- 0.01
Both ADCs Enabled
NOXREF bit active if VREF<0.3V
NOXREF bit Inactive if VREF>0.65
@DC, AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, 59.4 Hz Update Rate
-2-
REV. PrA
PRELIMINARY TECHNICAL DATA
ADuC846
PARAMETER
AUXILIARY ADC
No Missing Codes
2
Resolution
Output Noise
Integral Non Linearity
Offset Error
3
Offset Error Drift
Fullscale Error
4
Gain Error Drift
5
Power Supply Rejection
Normal Mode 50/60 Hz Rejection
On AIN
On REFIN
AUXILIARY ADC ANALOG INPUTS
Differential Input Voltage Ranges
9, 10
(Bipolar Mode – ADC0CON3 = 0)
(Unipolar Mode – ADC0CON3 = 1)
Average Analog Input Current
Analog Input Current Drift
Absolute AIN Voltage Limits
2, 11
MIN
16
16
See Table XII in ADuC836
Datasheet
± 15
-2
1
-2.5
± 0.5
80
60
60
TYP
MAX
UNITS
Bits
Bits Pk-Pk
ppm of FSR
LSB
µV
/°C
LSBs
ppm/°C
dBs
dBs
dBs
CONDITION
20 Hz Update Rate
Range = ± 2.5V, 20Hz Update Rate
Output Noise varies with selected Update Rates
1 LSB
16
AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, 19.79Hz Update Rate
50/60Hz ± 1Hz, 19.79Hz Update Rate
± REFIN
0
A
GND
- 0.03
REFIN
125
±2
A
VDD
+ 0.03
V
V
nA/V
pA/V/°C
V
REFIN=REFIN(+)-REFIN(-) (or Int 1.25V Ref)
REFIN=REFIN(+)-REFIN(-) (or Int 1.25V Ref)
ADC SYSTEM CALIBRATION
Full Scale Calibration Limit
Zero Scale Calibration Limit
Input Span
DAC
Voltage Range
Resistive Load
Capactive Load
Output Impedance
I
SINK
DC Specifications
7
Resolution
Relative Accuracy
Differential NonLinearity
Offset Error
Gain Error
8
AC Specifications
2,7
Voltage Output Settling Time
Digital to Analog Glitch Energy
+1.05 x FS
-1.05 x FS
0.8 x FS
2.1 x FS
V
V
V
0
0
V
REF
AV
DD
10
100
0.5
50
V
V
kΩ
pF
Ω
µA
DACCON.2 = 0
DACCON.2 = 1
From DAC Output to AGND
From DAC Output to AGND
12
±3
-1
± 50
±1
±1
15
10
LSBs
Bit
mV
%
%
us
nVs
Guaranteed 12-Bit Monotonic
AV
DD
Range
V
REF
Range
Setling time to 1LSB of final value
1 LSB change at major carry
REV. PrA
-3-
PRELIMINARY TECHNICAL DATA
ADuC846 SPECIFICATIONS
PARAMETER
INT REFERENCE
ADC Reference
Reference Voltage
Power Supply Rejection
Reference Tempco
DAC Reference
Reference Voltage
Power Supply Rejection
Reference Tempco
TEMPERATURE SENSOR
Accuracy
Thermal Impedance
MIN
TYP
MAX
1.237
1.25
45
100
2.5
50
± 100
1.2625
1
UNITS
CONDITION
V
dBs
ppm/°C
V
dBs
ppm/°C
initial tolerance @ 25°C, VDD=5V
2.475
1.525
initial tolerance @ 25°C, VDD=5V
+/- 2
90
52
°C
°C/W
°C/W
MQFP Package
CSP Package
TRANSDUCER BURNOUT CURRENT SOURCES
AIN+ Current
AIN- Current
Initial Tolerance at 25°C
Drift
EXCITATION CURRENT SOURCES
Output Current
Initial Tolerance at 25°C
Drift
Initial Current Matching at 25°C
Drift Matching
Line Regulation (AV
DD
)
Load Regulation
Output Compliance
POWER SUPPLY MONITOR (PSM)
AV
DD
Trip Point Selection Range
AV
DD
Trip Point Accuracy
AV
DD
Trip Point Accuracy
DV
DD
Trip Point Selection Range
DV
DD
Trip Point Accuracy
DV
DD
Trip Point Accuracy
-100
100
+/- 10
0.03
nA
nA
%
%/°C
AIN+ is the selected positive input to the
primary ADC
AIN- is the selected negative input to the
primary ADC
-200
+/-10
200
+/-1
20
1
A
GND
2.63
2.63
0.1
AV
DD
-0.6
4.63
+/- 3.0
+/- 3.0
4.63
+/- 3.0
+/- 3.0
µA
%
ppm/°C
%
ppm/°C
µA/V
V
V
V
%
%
V
%
%
Available from each Current Source
Matching between both Current Sources
AV
DD
=5V +/- 5%
Four Trip Points selectable in this range
T
MAX
= 85°C
T
MAX
= 125°C
Four Trip Points selectable in this range
T
MAX
= 85°C
T
MAX
= 125°C
CRYSTAL OSCILLATOR (XTAL 1AND XTAL2)
Logic Inputs, XTAL1 Only
2
V
INL
, Input Low Voltage
V
INH
, Input Low Voltage
XTAL1 Input Capacitance
XTAL2 Output Capacitance
3.5
2.5
18
18
0.8
0.4
V
V
V
V
pF
pF
DV
DD
= 5V
DV
DD
= 3V
DV
DD
= 5V
DV
DD
= 3V
-4-
REV. PrA
PRELIMINARY TECHNICAL DATA
ADuC846
PARAMETER
LOGIC INPUTS
All Inputs except SCLOCK, RESET
and XTAL1
2
V
INL
, Input Low Voltage
V
INH
, Input Low Voltage
SCLOCK and RESET Only
(Schmidt Triggered Inputs)
2
V
T+
V
T-
V
T+
- V
T-
Input Currents
Port 0, P1.2 P1.7,
EA
SCLOCK, MOSI,MISO
SS
13
RESET
35
P1.0, P1.1, Port 2, Port 3
-180
-20
Input Capacitance
LOGIC OUTPUTS
All Digital Outputs except XTAL2
2
V
OH
, Output High Voltage
V
OL
, Output Low Voltage
14
Floating State Leakage Current
Floating State Output Capacitance
START UP TIME
At Power On
After External RESET in Normal Mode
After WDT RESET in Normal Mode
From Idle Mode
From Power-Down Mode
Oscillator Running
Wakeup with INT0 Interrupt
Wakeup with SPI Interrupt
Wakeup with TIC Interrupt
Wakeup with External RESET
Oscillator Powered Down
Wakeup with INT0 Interrupt
Wakeup with SPI Interrupt
Wakeup with External RESET
5
2.0
1.3
0.95
0.8
0.4
0.3
2.0
-10
+/- 10
-40
+/-10
+/-10
105
+/-10
-660
-75
3.0
2.5
1.4
1.1
0.85
MIN
TYP
MAX
UNITS
CONDITION
0.8
0.4
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
pF
DV
DD
= 5V
DV
DD
= 3V
DV
DD
= 5V
DV
DD
= 3V
DV
DD
= 5V
DV
DD
= 3V
DV
DD
= 5V or 3V
V
IN
= 0V or V
DD
V
IN
= 0V, DV
DD
=5V, Internal Pullup
V
IN
= DV
DD
, DV
DD
=5V
V
IN
= 0V, DV
DD
=5V
V
IN
= DV
DD
, DV
DD
=5V, Internal Pull-Down
V
IN
= DV
DD
, DV
DD
=5V
V
IN
= 2V, DV
DD
=5V
V
IN
= 0.45V, DV
DD
=5V
All Digital Inputs
2.4
2.4
0.8
0.8
0.8
+/-10
5
V
V
V
V
V
µA
pF
DV
DD
= 5V, I
SOURCE
= 80
µA
DV
DD
= 3V, I
SOURCE
= 20
µA
I
SINK
= 8mA, SCLOCK, MOSI/SDATA
I
SINK
= 10mA, P1.0, P1.1
I
SINK
= 1.6mA, All Other Outputs
300
3
3
10
20
20
20
3
20
20
5
ms
ms
ms
us
us
us
us
us
Controlled via WDCON SFR
PLLCON.7 = 0
PLLCON.7 = 1
us
us
ms
REV. PrA
-5-
Embedded System
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