W83195BG-202 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Microcontrollers and processors> The clock generator> W83195BG-202

W83195BG-202: DescriptionProcessor Specific Clock Generator, 404.04MHz, CMOS, PDSO56, 0.300 INCH, LEAD FREE, SSOP-56; CategoryMicrocontrollers and processors The clock generator; File Size737KB，28 Pages; ManufacturerNuvoton Technology Corporation; Websitehttp://www.nuvoton.com.cn/hq/; Environmental Compliance

Download Datasheet Parametric Compare View All

W83195BG-202 Overview

Processor Specific Clock Generator, 404.04MHz, CMOS, PDSO56, 0.300 INCH, LEAD FREE, SSOP-56

W83195BG-202 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Nuvoton Technology Corporation
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	56
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G56
JESD-609 code	e3
length	18.42 mm
Humidity sensitivity level	3
Number of terminals	56
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	404.04 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	14.318 MHz
Certification status	Not Qualified
Maximum seat height	2.79 mm
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	7.52 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches	1

Preview

Download Datasheet

View All

W83195BR-202

W83195BG-202

Winbond Clock Generator for

AMD K8 System Series Chipsets

Date:

4/10/2006

Revision:

0.6

W83195BR-202/W83195BG-202

CLOCK GEN. FOR AMD K8 SYSTEM SERIES CHIPSET

Table of Content-

GENERAL DESCRIPTION ......................................................................................................... 1

PRODUCT FEATURES.............................................................................................................. 1

PIN CONFIGURATION............................................................................................................... 2

BLOCK DIAGRAM...................................................................................................................... 2

PIN DESCRIPTION .................................................................................................................... 3

5.1

5.2

5.3

5.4

5.5

5.6

Crystal I/O.................................................................................................................................3

CPU, PCIEX, AGP, and PCI Clock Outputs ...........................................................................3

Fixed Frequency Outputs.........................................................................................................4

C Control Interface .................................................................................................................5

Power Management Pins.........................................................................................................5

Power Pins................................................................................................................................5

FREQUENCY SELECTION BY HARDWARE OR SOFTWARE................................................ 6

C CONTROL AND STATUS REGISTERS............................................................................... 7

7.1

7.2

7.3

7.4

7.5

7.6

7.7

7.8

7.9

7.10

7.11

7.12

7.13

7.14

7.15

7.16

7.17

7.18

7.19

7.20

7.21

Register 10: Reserved (Default: 03h) ....................................................................................11

Register 12: Divisor Control (Default: 72h)............................................................................11

Register 14: Control (Default: 10h) ........................................................................................12

Register 15: SST Control (Default: E9h) ...............................................................................13

Register 18: Reserved (Default: 7Ah)....................................................................................14

Register 19: Control (Default: 22h) ........................................................................................14

- II -

W83195BR-202/W83195BG-202

CLOCK GEN. FOR AMD K8 SYSTEM SERIES CHIPSET

7.22

8.1

8.2

8.3

8.4

9.1

9.2

9.3

9.4

9.5

9.6

9.7

9.8

9.9

10.

11.

12.

Register21: Control (Default: 2Bh).........................................................................................15

Block Write protocol ...............................................................................................................16

Block Read protocol ...............................................................................................................16

Byte Write protocol .................................................................................................................16

Byte Read protocol.................................................................................................................16

ABSOLUTE MAXIMUM RATINGS .......................................................................................17

General Operating Characteristics ........................................................................................17

Skew Group timing clock........................................................................................................18

CPU Electrical Characteristics ...............................................................................................18

AGP Electrical Characteristics ...............................................................................................19

PCI Electrical Characteristics.................................................................................................19

24M, 48M Electrical Characteristics ......................................................................................20

REF Electrical Characteristics ...............................................................................................20

PCIEX 0.7V Electrical Characteristics ...................................................................................21

ACCESS INTERFACE.............................................................................................................. 16

SPECIFICATIONS.................................................................................................................... 17

ORDERING INFORMATION .................................................................................................... 22

HOW TO READ THE TOP MARKING ..................................................................................... 22

PACKAGE DRAWING AND DIMENSIONS ............................................................................. 23

- III -

Publication Release Date: Apr. 2006

Revision 0.6

W83195BG-202 Related Products

	W83195BG-202	W83195BR-202
Description	Processor Specific Clock Generator, 404.04MHz, CMOS, PDSO56, 0.300 INCH, LEAD FREE, SSOP-56	Processor Specific Clock Generator, 404.04MHz, CMOS, PDSO56, 0.300 INCH, SSOP-56
Is it lead-free?	Lead free	Contains lead
Is it Rohs certified?	conform to	incompatible
Maker	Nuvoton Technology Corporation	Nuvoton Technology Corporation
Parts packaging code	SSOP	SSOP
package instruction	SSOP,	SSOP,
Contacts	56	56
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
JESD-30 code	R-PDSO-G56	R-PDSO-G56
JESD-609 code	e3	e0
length	18.42 mm	18.42 mm
Number of terminals	56	56
Maximum operating temperature	70 °C	70 °C
Maximum output clock frequency	404.04 MHz	404.04 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	240
Master clock/crystal nominal frequency	14.318 MHz	14.318 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.79 mm	2.79 mm
Maximum supply voltage	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	40	30
width	7.52 mm	7.52 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC

Recommended Resources

One-way operation reverse braking control circuit

C523 double column vertical lathe control circuit 01

Simple current source circuit diagram

Constant current source using operational amplifier TAA861

Cursor control circuit

Practical flashing light circuit

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components