V
DSM
I
TAVM
I
TRMS
I
TSM
V
T0
r
T
•
•
•
•
•
=
=
=
=
=
=
5200 V
3875 A
6090 A
55000 A
1.03 V
0.160 mΩ
Ω
Phase Control Thyristor
5STP 34Q5200
Doc. No. 5SYA1052-01 Sep. 01
Patented free-floating silicon technology
Low on-state and switching losses
Designed for traction, energy and industrial applications
Optimum power handling capability
Interdigitated amplifying gate
Blocking
Part Number
V
DSM
V
DRM
V
RSM1
I
DSM
I
RSM
dV/dt
crit
V
RSM
V
RRM
5STP
5200 V
4400 V
5700 V
5STP 34Q5000 5STP 34Q4600
Conditions
5000 V
4200 V
5500 V
≤
500 mA
≤
500 mA
2000 V/µs
4600 V
4000 V
5100 V
f = 5 Hz, t
p
= 10ms
f = 50 Hz, t
p
= 10ms
t
p
= 5ms, single pulse
V
DSM
V
RSM
T
j
= 125°C
Exp. to 0.67 x V
DRM
, T
j
= 125°C
V
DRM
/ V
RRM
are equal to V
DSM
/ V
RSM
values up to T
j
= 110°C
Mechanical data
F
M
Mounting force
nom.
min.
max.
a
Acceleration
Device unclamped
Device clamped
m
D
S
D
a
Weight
Surface creepage distance
Air strike distance
50 m/s
2
100 m/s
2
2.1 kg
36 mm
15 mm
90 kN
81 kN
108 kN
ABB Semiconductors AG reserves the right to change specifications without notice.
5STP 34Q5200
On-state
I
TAVM
I
TRMS
I
TSM
I
2
t
Max. average on-state current
Max. RMS on-state current
Max. peak non-repetitive
surge current
Limiting load integral
3875 A
6090 A
55000 A
60000 A
tp =
tp =
10 ms
8.3 ms
10 ms
8.3 ms
3000 A
T
j
= 125°C
T
j
= 125°C
After surge:
V
D
= V
R
= 0V
Half sine wave, T
C
= 70°C
15125 kA
2
s tp =
14940 kA
2
s tp =
V
T
V
T0
r
T
I
H
I
L
On-state voltage
Threshold voltage
Slope resistance
Holding current
1.54 V
1.03 V
0.160 mΩ
50-125 mA
20-75 mA
I
T
=
I
T
= 2300 - 7000 A
T
j
= 25°C
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
Latching current
100- mA
500
75-250 mA
Switching
di/dt
crit
Critical rate of rise of on-state
current
250 A/µs
500 A/µs
Cont. f = 50 Hz V
D
≤
0.67⋅V
DRM
, T
j
= 125°C
60 sec.
f = 50Hz
V
D
= 0.4⋅V
DRM
I
TRM
= 3000 A
I
FG
= 2 A, t
r
= 0.5 µs
I
FG
= 2 A, t
r
= 0.5 µs
t
d
t
q
Q
rr
Delay time
Turn-off time
≤
≤
min
max
3.0 µs
700 µs
V
D
≤
0.67⋅V
DRM
I
TRM
= 3000 A, T
j
= 125°C
dv
D
/dt = 20V/µs V
R
> 200 V, di
T
/dt = -5 A/µs
Recovery charge
7000 µAs
9000 µAs
Triggering
V
GT
I
GT
V
GD
I
GD
V
FGM
I
FGM
V
RGM
P
G
Gate trigger voltage
Gate trigger current
Gate non-trigger voltage
Gate non-trigger current
Peak forward gate voltage
Peak forward gate current
Peak reverse gate voltage
Gate power loss
2.6 V
400 mA
0.3 V
10 mA
12 V
10 A
10 V
3W
T
j
= 25°
T
j
= 25°
V
D
=0.4 x V
DRM
V
D
= 0.4 x V
DRM
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1052-01 Sep. 01
page 2 of 6
5STP 34Q5200
Thermal
T
jmax
T
stg
R
thJC
Max. operating junction temperature
range
Storage temperature range
Thermal resistance
junction to case
125 °C
-40…140 °C
10 K/kW
10 K/kW
5 K/kW
R
thCH
Thermal resistance case to
heat sink
Analytical function for transient thermal
impedance:
Anode side cooled
Cathode side cooled
Double side cooled
Single side cooled
Double side cooled
2 K/kW
1 K/kW
Z
thJC
(t) =
å
R
i
(1 - e
i
=
1
i
R
i
(K/kW)
τ
i
(s)
1
3.27
0.5237
2
0.736
0.1082
3
0.661
0.02
n
- t/
τ
i
)
4
0.312
0.0075
Fig. 1 Transient thermal impedance junction to case.
On-state characteristic model:
VT
=
A
+
B
⋅
iT
+
C
⋅
ln(
iT
+
1)
+
D
⋅
IT
Valid for i
T
= 500 – 14000 A
A
1.0649
B
0.000105
C
-0.038879
D
0.008155
Fig. 2 On-state characteristics.
T
j
=125°C, 10ms half sine
Fig. 3 On-state characteristics.
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1052-01 Sep. 01
page 3 of 6
5STP 34Q5200
T
case
(°C)
130
Double-sided cooling
125
120
115
110
105
100
95
90
85
80
75
70
0
1000
2000
3000
4000
5000
DC
180° rectangular
180° sine
120° rectangular
6000
I
TAV
(A)
Fig. 4 On-state power dissipation vs. mean on-
state current. Turn - on losses excluded.
Fig. 5 Max. permissible case temperature vs.
mean on-state current.
Fig. 6 Surge on-state current vs. pulse length.
Half-sine wave.
Fig. 7 Surge on-state current vs. number of
pulses. Half-sine wave, 10 ms, 50Hz.
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1052-01 Sep. 01
page 4 of 6
5STP 34Q5200
5STP 34Q5200
Fig. 8 Gate trigger characteristics.
Fig. 9 Max. peak gate power loss.
Fig. 10 Recovery charge vs. decay rate of on-
state current.
Fig. 11 Peak reverse recovery current vs. decay
rate of on-state current.
Turn - off time, typical parameter relationship.
Fig. 12 t
q
/t
q1
= f
1
(T
j
)
Fig. 13 t
q
/t
q1
= f
2
(-di
T
/dt)
Fig. 14 t
q
/t
q1
= f
3
(dv/dt)
t
q
= t
q1
•
f
1
(T
j
)
•
f
2
(-di
T
/dt)
•
f
3
(dv/dt)
t
q1
:at normalized values (see page 2)
t
q
: at varying conditions
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1052-01 Sep. 01
page 5 of 6
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