EEWORLDEEWORLDEEWORLD

Part Number

Search

71T016SA20Y2

Description
Standard SRAM, 64KX16, 20ns, CMOS, PDSO44
Categorystorage   
File Size138KB,9 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

71T016SA20Y2 Overview

Standard SRAM, 64KX16, 20ns, CMOS, PDSO44

71T016SA20Y2 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
package instructionSOJ, SOJ44,.44
Reach Compliance Codenot_compliant
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J44
JESD-609 codee0
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals44
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize64KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ44,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply2.5 V
Certification statusNot Qualified
Maximum standby current0.005 A
Minimum standby current2.38 V
Maximum slew rate0.08 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.375 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Base Number Matches1
2.5V CMOS Static RAM
for Automotive Applications
1 Meg (64K x 16-Bit)
Features
x
x
IDT71T016SA
Description
The IDT71T016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs for automotive applications.
The IDT71T016 has an output enable pin which operates as fast as
6ns, with address access times as fast as 12ns. All bidirectional inputs and
outputs of the IDT71T016 are LVTTL-compatible and operation is from a
single 2.5V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
x
x
x
x
x
x
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
— Automotive: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 2.5V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball
Plastic FBGA packages
Functional Block Diagram
OE
Output
Enable
Buffer
A
0
– A
15
Address
Buffers
Row / Column
Decoders
I/O
15
Chip
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
Low
Byte
I/O
Buffer
8
8
High
Byte
I/O
Buffer
8
CS
I/O
8
WE
Write
Enable
Buffer
64K x 16
Memory
Array
16
I/O
7
I/O
0
BHE
Byte
Enable
Buffers
BLE
6473 drw 01
AUGUST 2004
1
©2004 Integrated Device Technology, Inc.
DSC-6473/00

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2759  2200  2890  2887  1054  56  45  59  22  13 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号