Bi-phase clock signal generation circuit

Shown is the phase clock signal generation circuit. The circuit uses the NE555 actual circuit as the core to form an oscillator. It can generate
complementary interleaved bi-phase clock pulses required by most bi-phase dynamic MOS memories and shift registers. The pulse duty cycle depends on the resistance
of the external resistors Ri and R2 . The oscillation frequency depends on the resistance values ​​of Ri and R2 and the value of the timing circuit C. The SN7473 flip-flop is used to determine which phase is gated by the SN7402 NOR gate. The maximum operating frequency of this circuit is l MHz.