M65KG512AB8W9 datasheet, PDF - EEWORLD Datasheet

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M65KG512AB8W9: Description512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM; Categorystorage storage; File Size311KB，54 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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M65KG512AB8W9 Overview

512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM

M65KG512AB8W9 Parametric

Parameter Name	Attribute value
Maker	STMicroelectronics
Parts packaging code	WAFER
package instruction	DIE,
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	6 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	X-XUUC-N
memory density	536870912 bi
Memory IC Type	DDR DRAM
memory width	16
Number of functions	1
Number of ports	1
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-30 °C
organize	32MX16
Package body material	UNSPECIFIED
encapsulated code	DIE
Package shape	UNSPECIFIED
Package form	UNCASED CHIP
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal location	UPPER

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M65KG512AB

512Mbit (4 banks x 8 Mb x 16)

1.8 V supply, DDR low power SDRAM

Features

■

512Mbit Synchronous Dynamic RAM

– Organized as 4 banks of 8 Mwords, each

16 bits wide

Double Data Rate (DDR)

– 2 Data Transfers/Clock cycle

– Data Rate: 332 Mbit/s max. for 6ns speed

class

Supply voltage

– V

= 1.7 to 1.9 V (1.8 V typical in

accordance with JEDEC standard)

– V

DDQ

= 1.7 to 1.9 V for Inputs/Outputs

Synchronous Burst Read and Write

– Fixed Burst Lengths: 2-, 4-, 8-, 16 words

– Burst Types: Sequential and Interleaved.

– Clock Frequency: 133 MHz (7.5 ns speed

class), 166 MHz (6 ns speed class)

– Clock Valid to Output Delay (CAS Latency):

3 at the maximum clock frequency

– Burst Read Control by Burst Read

Terminate And Precharge Commands

Automatic Precharge

Byte Write controlled by LDQM and UDQM

Low-power features

– Partial Array Self Refresh (PASR)

– Automatic Temperature Compensated Self

Refresh (ATCSR)

– Driver Strength (DS)

– Deep Power-Down mode

– Auto Refresh and Self Refresh

LVCMOS interface compatible with multiplexed

addressing

Operating temperature:

–

−30

to 85 °C

–

−30

to 105 °C

The M65KG512AB is only available as part of a multi-chip package product.

Wafer

■

February 2007

Rev 3

1/54

www.st.com

Contents

M65KG526AB

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

2.14

2.15

Address Inputs (A0-A12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Bank Select Address Inputs (BA0-BA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Data Inputs/Outputs (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Chip Enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Column Address Strobe (CAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Row Address Strobe (RAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Write Enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Clock Inputs (K, K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Clock Enable (KE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Lower/Upper Data Input Mask (LDQM, UDQM) . . . . . . . . . . . . . . . . . . . . 10

Lower/Upper Data Read/Write Strobe Input/Output (LDQS, UDQS) . . . . 10

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

DDQ

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

SSQ

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

Mode Register Set command (MRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Extended Mode Register Set command (EMRS) . . . . . . . . . . . . . . . . . . . 12

Bank(Row) Activate command (ACT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Read command (READ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Read with Auto Precharge command (READA) . . . . . . . . . . . . . . . . . . . . 13

Burst Read Terminate command (BST) . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Write command (WRIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Write with Auto Precharge command (WRITA) . . . . . . . . . . . . . . . . . . . . 14

Precharge Selected Bank/Precharge All Banks command (PRE/PALL) . 14

Self Refresh Entry command (SELF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Self Refresh Exit command (SELFX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2/54

M65KG526AB

Contents

3.12

3.13

3.14

3.15

3.16

3.17

Auto Refresh command (REF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Power-Down Entry command (PDEN) . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Power-Down Exit command (PDEX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Deep Power-Down Entry command (DPDEN) . . . . . . . . . . . . . . . . . . . . . 16

Device Deselect command (DESL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

No Operation command (NOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1

4.2

4.3

4.4

4.5

4.6

4.7

Power-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Burst Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Burst Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Auto Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Deep Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1

5.2

Mode Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Extended Mode Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

DC and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

3/54

List of tables

M65KG526AB

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Bank selection using BA0-BA1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Minimum delay between two commands in concurrent Auto Precharge Mode . . . . . . . . . 18

Burst Type Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Mode Register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Extended Mode Register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating and ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC Characteristics 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Self Refresh current (I

DD6

) in normal operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

AC characteristics - T

= -30 to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

AC characteristics - T

= -30 to 105 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

AC characteristics measured in clock period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

4/54

M65KG526AB

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Simplified command state diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Definition of command and address inputs timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Definition of Read timings 1/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Definition of Read timings 2/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Consecutive Bank(Row) Activate command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Read followed by Read in same bank and row . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Read followed by Read in a different bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Read with Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Read followed by Auto Precharge ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Read operation (Burst lengths = 2, 4 and 8, CAS latency = 3) . . . . . . . . . . . . . . . . . . . . . . 37

Burst Terminate during Read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Write followed by Write in same bank and row . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Write followed by Write in a different bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Write operation with Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Write with Auto Precharge ac Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Write operation (Burst lengths = 2, 4 and 8, CAS latency = 1) . . . . . . . . . . . . . . . . . . . . . . 41

AC Write ac waveforms (data masking using LDQM/UDQM). . . . . . . . . . . . . . . . . . . . . . . 42

Mode Register/Extended Mode Register Set commands ac waveforms . . . . . . . . . . . . . . 43

Read followed by Write using the Burst Read Terminate command (BST) . . . . . . . . . . . . 44

Write followed by Read (Write completed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Write followed by Read in the same Bank and Row (Write Interrupted). . . . . . . . . . . . . . . 46

Power-Up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Auto Refresh command ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Self Refresh Entry and Exit commands ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Deep Power-Down Entry command ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Deep Power-Down Exit ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

5/54

M65KG512AB8W9 Related Products

	M65KG512AB8W9	M65KG512AB	M65KG512AB8W8	M65KG512AB6W8	M65KG512AB6W9
Description	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM
Parts packaging code	WAFER	-	WAFER	-	WAFER
package instruction	DIE,	-	DIE, WAFER	-	DIE, WAFER
Reach Compliance Code	unknow	-	_compli	_compli	_compli
ECCN code	EAR99	-	EAR99	-	EAR99
access mode	FOUR BANK PAGE BURST	-	FOUR BANK PAGE BURST	-	FOUR BANK PAGE BURST
Maximum access time	6 ns	-	6 ns	5 ns	5 ns
Other features	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH
JESD-30 code	X-XUUC-N	-	X-XUUC-N	-	X-XUUC-N
memory density	536870912 bi	-	536870912 bi	536870912 bi	536870912 bi
Memory IC Type	DDR DRAM	-	DDR DRAM	DDR DRAM	DDR DRAM
memory width	16	-	16	16	16
Number of functions	1	-	1	-	1
Number of ports	1	-	1	-	1
word count	33554432 words	-	33554432 words	33554432 words	33554432 words
character code	32000000	-	32000000	32000000	32000000
Operating mode	SYNCHRONOUS	-	SYNCHRONOUS	-	SYNCHRONOUS
Maximum operating temperature	105 °C	-	85 °C	85 °C	105 °C
Minimum operating temperature	-30 °C	-	-30 °C	-30 °C	-30 °C
organize	32MX16	-	32MX16	32MX16	32MX16
Package body material	UNSPECIFIED	-	UNSPECIFIED	PLASTIC/EPOXY	UNSPECIFIED
encapsulated code	DIE	-	DIE	-	DIE
Package shape	UNSPECIFIED	-	UNSPECIFIED	-	UNSPECIFIED
Package form	UNCASED CHIP	-	UNCASED CHIP	-	UNCASED CHIP
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified
self refresh	YES	-	YES	-	YES
Maximum supply voltage (Vsup)	1.9 V	-	1.9 V	-	1.9 V
Minimum supply voltage (Vsup)	1.7 V	-	1.7 V	-	1.7 V
Nominal supply voltage (Vsup)	1.8 V	-	1.8 V	1.8 V	1.8 V
surface mount	YES	-	YES	-	YES
technology	CMOS	-	CMOS	CMOS	CMOS
Temperature level	OTHER	-	OTHER	OTHER	OTHER
Terminal form	NO LEAD	-	NO LEAD	-	NO LEAD
Terminal location	UPPER	-	UPPER	-	UPPER
Is it Rohs certified?	-	-	incompatible	incompatible	incompatible
Maximum clock frequency (fCLK)	-	-	133 MHz	166 MHz	166 MHz
I/O type	-	-	COMMON	COMMON	COMMON
interleaved burst length	-	-	2,4,8,16	2,4,8,16	2,4,8,16
Output characteristics	-	-	3-STATE	3-STATE	3-STATE
Encapsulate equivalent code	-	-	WAFER	WAFER	WAFER
power supply	-	-	1.8 V	1.8 V	1.8 V
refresh cycle	-	-	8192	8192	8192
Continuous burst length	-	-	2,4,8,16	2,4,8,16	2,4,8,16
Maximum standby current	-	-	0.00001 A	0.00001 A	0.00001 A
Maximum slew rate	-	-	0.09 mA	0.18 mA	0.18 mA

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