EEWORLDEEWORLDEEWORLD

Part Number

Search

550AE840M000BGR

Description
LVPECL Output Clock Oscillator, 840MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size556KB,44 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

550AE840M000BGR Overview

LVPECL Output Clock Oscillator, 840MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

550AE840M000BGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Maximum control voltage3.3 V
Minimum control voltage
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate25 ppm
frequency stability20%
JESD-609 codee4
Manufacturer's serial number550
Installation featuresSURFACE MOUNT
Nominal operating frequency840 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size177.8mm x 127.0mm x 41.91mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
Si550
V
O L TA G E
- C
O N T R O L L E D
C
R Y S TA L
O
S C I L L A T O R
(V CX O)
10 MH
Z T O
1.4 G H
Z
Features
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL
®
with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Pin Assignments:
See page 6.
(Top View)
V
C
1
2
3
6
5
4
V
DD
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
CLK–
CLK+
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
®
Clock Synthesis
ADC
Vc
OE
GND
Rev. 0.5 7/06
Copyright © 2006 by Silicon Laboratories
Si550
Wireless network protocol design help
My graduation project is about wireless sensor network. Now I use NRF24L01 module + MCU to make a model. I can do the communication, but I don't know how to start with the protocol part. Because my ma...
虚V界 RF/Wirelessly
32RGB rotating LED_Xiao Cui Hot Wheels
Housing prices are rising, pork prices are rising...but wages are not rising! In such a social environment, is there any other idea besides suicide? Haha. Then come and make Cui Xiao's Hot Wheels, I g...
qwerttyy DIY/Open Source Hardware
uf2 bootloader for nRF52840DK development board
The uf2 bootloader of the nRF52840DK development board uses the native USB of the nRF52840 to simulate a USB disk, and can directly copy and run the uf2 program. [list] [*]Source code: [url=https://gi...
dcexpert MicroPython Open Source section
A different question about the wavedev structure of 2450 AC97 and IIS audio driver
When sampling external sound, SetRate and Render2 are used to convert the sampled data into the sampling rate specified by the application and perform linear interpolation operations (playback should ...
younha Embedded System
Switching power supply design tips: How to choose the correct operating frequency
With the emphasis now on the need for more efficient, lower cost power solutions, we created this column to provide helpful tips on a variety of power management topics. This column is intended for de...
qwqwqw2088 Analogue and Mixed Signal
Matlab Lesson 3 - Block Operations of Matrix
[size=83%]3.[/size][font=宋体][size=15pt]Block operations of matrices[/size][/font] [size=78%][font=Wingdings][size=65%]n[/size][/font][/size][font=宋体][size=14pt]Change matrix elements, insert sub-block...
gaoxiao Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2221  2380  794  52  328  45  48  16  2  7 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号