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74VHCT00MTC

Description
NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14
Categorylogic   
File Size120KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74VHCT00MTC Overview

NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14

74VHCT00MTC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Codeunknown
seriesAHCT/VHCT
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.008 A
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Prop。Delay @ Nom-Sup9 ns
propagation delay (tpd)9 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74VHC00
74VHCT00 Quad 2-Input NAND Gate
February 1998
74VHC00
74VHCT00
Quad 2-Input NAND Gate
General Description
The VHC/VHCT00 is an advanced high-speed CMOS
2-Input NAND Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The internal circuit is com-
posed of 3 stages, including buffer output, which provide
high noise immunity and stable output. An input protection
circuit insures that 0V to 7V can be applied to the input pins
without regard to the supply voltage. This device can be
used to interface 5V to 3V systems and two supply systems
such as battery backup. This circuit prevents device destruc-
tion due to mismatched supply and input voltages.
Features
n
High Speed:
VHC t
pd
= 3.7ns (typ) at T
A
= 25˚C
VHCT t
pd
= 5.0 ns (typ) at T
A
= 25˚C
n
High noise immunity:
VHC V
NIH
= V
NIL
= 28% V
CC
(min)
VHCT V
IH
= 2.0V, V
IL
= 0.8V
n
Power down protection:
VHC inputs only
VHCT inputs and outputs
n
Low noise: V
OLP
= 0.8V (max)
n
Low power dissipation:
I
CC
= 2 µA (max) at T
A
= 25˚C
n
Pin and function compatible with 74HC/HCT00
NOTE: ADD EXTERNAL PULL UP RESISTOR TO
VHCT OUTPUTS TO DRIVE CMOS INPUTS
Ordering Code:
Commercial
74VHC00M
74VHC00SJ
74VHC00MTC
74VHC00N
74VHCT00M
74VHCT00SJ
74VHCT00MTC
74VHCT00N
Package Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Molded JEDEC SOIC
14-Lead Molded EIAJ SOIC
14-Lead Molded JEDEC Type 1 TSSOP
14-Lead Molded DIP
14-Lead Molded JEDEC SOIC
14-Lead Molded EIAJ SOIC
14-Lead Molded JEDEC Type 1 TSSOP
14-Lead Molded DIP
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter
″X’
to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Assignment for DIP,TSSOP and SOIC
DS011504-1
DS011504-2
© 1998 Fairchild Semiconductor Corporation
DS011504
www.fairchildsemi.com

74VHCT00MTC Related Products

74VHCT00MTC 74VHCT00SJX 74VHCT00MX 74VHCT00MTCX 74VHCT00SJ 74VHCT00N
Description NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14 NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, EIAJ, PLASTIC, SOIC-14 NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, SOIC-14 NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14 NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, EIAJ, PLASTIC, SOIC-14 NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDIP14, PLASTIC, DIP-14
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code TSSOP SOIC SOIC TSSOP SOIC DIP
package instruction TSSOP, TSSOP14,.25 SOP, SOP14,.3 SOP, SOP14,.25 TSSOP, TSSOP14,.25 SOP, SOP14,.3 DIP, DIP14,.3
Contacts 14 14 14 14 14 14
Reach Compliance Code unknown unknown compliant compliant compliant compliant
series AHCT/VHCT AHCT/VHCT AHCT/VHCT AHCT/VHCT AHCT/VHCT AHCT/VHCT
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDIP-T14
JESD-609 code e0 e0 e0 e0 e0 e0
length 5 mm 10.1 mm 8.65 mm 5 mm 10.1 mm 19.18 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE
MaximumI(ol) 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
Number of functions 4 4 4 4 4 4
Number of entries 2 2 2 2 2 2
Number of terminals 14 14 14 14 14 14
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP SOP TSSOP SOP DIP
Encapsulate equivalent code TSSOP14,.25 SOP14,.3 SOP14,.25 TSSOP14,.25 SOP14,.3 DIP14,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V 5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Sup 9 ns 9 ns 9 ns 9 ns 9 ns 9 ns
propagation delay (tpd) 9 ns 9 ns 9 ns 9 ns 9 ns 9 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO NO NO NO
Maximum seat height 1.1 mm 2.1 mm 1.75 mm 1.1 mm 2.1 mm 5.08 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES NO
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING THROUGH-HOLE
Terminal pitch 0.65 mm 1.27 mm 1.27 mm 0.65 mm 1.27 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 5.3 mm 3.9 mm 4.4 mm 5.3 mm 7.62 mm
Base Number Matches 1 1 1 1 1 1
Maker Fairchild Fairchild Fairchild Fairchild - -
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