531NB776M000DGR datasheet, PDF

Datasheet> All Categories > oscillator> 531NB776M000DGR

531NB776M000DGR: DescriptionLVDS Output Clock Oscillator, 776MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531NB776M000DGR Overview

LVDS Output Clock Oscillator, 776MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531NB776M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	776 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Infineon 650 V CoolSiC™ MOSFET Series Analysis

Relay controlled autotransformer AC stabilized power supply circuit 3

Hemisphere brand BCD-180D, BCD-208B refrigerator circuit

Infrared automatic faucet controller circuit diagram

AD22100 type voltage temperature sensor circuit with signal conditioning

Three-phase motor two-speed 2Y/△ connection with indicator light evasion circuit

About TM4C123G as USB host: I am currently working on something that requires the use of tm4c123g as a USB host to communicate with another USB device, but this USB device is of a vendor-defined specification type. What should I...; 爱知boy Microcontroller MCU

Creating a swap partition on the Android development board: dd if=/dev/zero of=/moreswap bs=1M count=2048 ======>Create a 2048M (2G) swap partition. Do I need to enter Chinese characters when executing this in Terminal? ======>Create a 2048M (2G) swap partitio...; 亮痕 Embedded System

About the address of uClinux mtd map file: When partitioning, if my FLASH has 2M, I hope to divide it into three parts: 1920KB 64KB 64KB My map file is as follows: static struct mtd_partition firefox_partitions[] = { { name: "kernel partition ...; easybyte Linux and Android

I want to improve my PCB Layout skills. Is there any good training you can recommend? Please help me!: I can currently make 2/4 layer boards, impedance control, differential, equal length, and stacking, but I am not good at it because I lack systematic learning and practical experience. I usually use a...; LONG_EM PCB Design

51 MCU C language control and application tutorial: 51 single chip microcomputer C language control and application tutorial, very good, for beginners...; yjs986917 51mcu

A senior project used a digital tube, a three-pin inductor, and a three-pin capacitor.: A senior project used a digital tube, a three-pin inductor, and a three-pin capacitor.1. Are common anodes or common cathodes more commonly used in digital tubes?2. The difference between a three-pin ...; QWE4562009 Discrete Device

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components